DS92LV2421 Datasheet, PDF (29/50 Pages) National Semiconductor (TI) – 10 to 75 MHz, 24-bit Channel Link II Serializer and Deserializer

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DS92LV2421, DS92LV2422
SNLS321B – MAY 2010 – REVISED APRIL 2013
PDB
(DES)
RIN
(Diff.)
LOCK
L
DO[23:0],
CO1,CO2,CO3 L
CLKOUT*
(DES) L
PASS ^H
active serial stream
H
L
L
L
X
H
L
L
L
OFF
Locking
CONDITIONS: * RFB = L, and OSS_SEL = H
Active
C0 or C1 Error
In Bit Stream
(Loss of LOCK)
Active
OFF
Figure 24. Des Outputs with Output State Select High (OSS_SEL = H)
Table 10. OSC_SEL (Oscillator) Configuration
OSC_SEL[2:0] INPUTS
OSC_SEL2
OSC_SEL1
OSC_SEL0
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
H
L
H
H
H
L
H
H
H
CLKOUT Oscillator Frequency
Off – Feature Disabled – Default
50 MHz ±40%
25 MHz ±40%
16.7 MHz ±40%
12.5 MHz ±40%
10 MHz ±40%
8.3 MHz ±40%
6.3 MHz ±40%
PDB
(DES)
RIN
(Diff.)
LOCK
L
DO[23:0],
CO1,CO2,CO3 L
CLKOUT*
(DES) L
f
PASS ^H
active serial stream
H
L
L
f
X
H
L
L
L
OFF
Locking
Active
C0 or C1 Error
In Bit Stream
(Loss of LOCK)
CONDITIONS: * RFB = L, OSS_SEL = H , and OSC_SEL not equal to 000.
Active
OFF
Figure 25. Des Outputs with Output State High and CLK Output Oscillator Option Enabled
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