THS7303 Datasheet, PDF (26/43 Pages) Texas Instruments – 3-Channel Low Power Video Amplifier with I2C Control, Selectable Filters, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes

THS7303
SLOS479 – OCTOBER 2005
www.ti.com
APPLICATION INFORMATION (continued)
When the ac sync-tip-clamp (STC) operation is used, there must also be some finite amount of discharge bias
current. As previously described, if the input signal goes below the 135-mV clamp level, the internal loop of the
THS7303 sources current to increase the voltage appearing at the input pin. As the difference between the signal
level and the 135-mV reference level increases, the amount of source current increases proportionally –
supplying up to 2-mA of current. Thus the time to re-establish the proper STC voltage can be very fast. If the
difference is small, then the source current is also small to account for minor voltage droop.
But, what happens if the input signal goes above the 135-mV input level? The problem is the video signal is
always above this level and must not be altered in any way. But, if the sync level of the input signal is above the
135-mV level, then the internal discharge (sink) current reduces the ac-coupled bias signal to the proper 135-mV
level.
This discharge current must not be large enough to alter the video signal appreciably or picture quality issues
may arise. This is often seen by looking at the tilt (droop) of a constant luma signal being applied, and looking at
the resulting output level. The associated change in luma level from the beginning of the video line to the end of
the video line is the amount of line tilt (droop). The amount of tilt can be seen by the general formula:
I = C dV/dt
where I is the discharge current and C is the external coupling capacitor which is typically 0.1 µF. If the current (I)
and the capacitor (C) are constant, then the tilt is governed by:
i/C = dV/dt
If the discharge current is small the amount of tilt is low which is good. But, the amount of time for the system to
capture the sync signal could be too long. This is also termed hum rejection. Hum arises from the ac line voltage
frequency of 50 Hz or 60 Hz. The value of the discharge current and the ac-coupling capacitor combine to dictate
the hum rejection and the amount of line tilt.
Because many users have different thoughts as to the proper amount of hum rejection and line tilt, the THS7303
has incorporated a variable sink bias current selectable through the I²C interface. The Low Bias mode selects
about 1.8-µA of dc sink bias current for low line tilt. But, if more hum rejection is desired, then selecting the Mid
Bias mode increases the dc sink bias current to about 5.8 µA. For severe environments, the High Bias mode has
about 7.8 µA of dc sink bias current. This drawback to these higher bias modes is an increase in line tilt, but with
an increase in hum rejection. The other method to change the hum rejection and line tilt is to change the input
capacitor used. An increase in the capacitor from 0.1 µF to 0.22 µF decreases the hum rejection and line tilt by a
factor of 2.2. A decrease of this input capacitor accomplishes the opposite effect. Note that the amplifier input
bias current of nominally 0.6 µA has already been taken into account when stipulating the 1.8 µA/5.8 µA/7.8 µA
current sink values.
To ensure proper stability of the AC STC control loop, the source impedance must be less than 600-Ω and the
input capacitor must be greater than 0.01 µF. Otherwise, there is a possibility of the control loop ringing. The
ringing appears on the output of the THS7303. Similar to the dc modes of operation, many DACs and encoders
use a resistor to establish the output voltage. These resistors are typically less than 300 Ω. Thus, stability of the
AC STC loop is ensured. But, if the source impedance looking from the THS7303 input perspective is high or
open, then adding a 300-Ω resistor to GND ensures proper operation of the THS7303.
If a MUX channel is not required in the system, then it is recommended to place a 75-Ω resistor to GND. This is
not required, but it helps minimize any potential issues.
OUTPUT MODES OF OPERATION – DC COUPLED
The THS7303 incorporates a rail-to-rail output stage that can be used to drive the line directly without the need
for large ac-coupling capacitors. This is accomplished by connecting the output pin of each channel directly to
the SAG output pin of the corresponding channel as shown in Figure 64. This offers the best line tilt and field tilt
(or droop) performance since there is no ac coupling occurring. Keep in mind that if the input is ac coupled, then
the resulting tilt due to the input ac coupling is still seen on the output regardless of the output coupling. The
70-mA output current drive capability of the THS7303 is designed to drive two video lines simultaneously –
essentially a 75-Ω load – while keeping the output dynamic range as wide as possible.
One concern of dc coupling is if the line is terminated to ground. When the AC-bias input mode is selected, the
output of the THS7303 is at mid-rail. With 2 lines terminated to ground, this creates a dc current path to exist
which results in a slightly decreased high output voltage swing resulting in an increase in power dissipation of the
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