THS7303 Datasheet, PDF (2/43 Pages) Texas Instruments – 3-Channel Low Power Video Amplifier with I2C Control, Selectable Filters, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes

THS7303
SLOS479 – OCTOBER 2005
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
As part of the THS7303 flexibility, the 2:1 MUX input can be selected for ac or dc coupled inputs. The ac coupled
modes include a sync-tip clamp option for CVBS/Y'/G'/B'/R' with sync or a fixed bias for the C'/P'_B/P'_R non-sync
channels. The dc input options include a dc input or a dc + 135-mV input offset shift to allow for a full sync
dynamic range at the output with 0-V input.
PACKAGING/ORDERING INFORMATION
PACKAGED DEVICES⁽¹⁾
THS7303PW
THS7303PWR
PACKAGE TYPE
TSSOP-20
TRANSPORT MEDIA,
QUANTITY
Rails, 75
Tape and reel, 2500
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
V_SS Supply voltage, V_S+ to GND
V_I
Input voltage
I_O
Output current
Continuous power dissipation
T_J
Maximum junction temperature, any condition⁽²⁾
T_J
Maximum junction temperature, continuous operation, long term reliability⁽³⁾
T_stg Storage temperature range
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
HBM
ESD ratings CDM
MM
UNIT
5.5 V
–0.4V to V_S+
±125 mA
See Dissipation Rating Table
150°C
125°C
–65°C to 150°C
300°C
2000 V
750 V
100 V
(1) Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied Exposure to absolute maximum rated conditions for extended periods may degrade device reliability.
(2) The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process.
(3) The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this
temperature may result in reduced reliability and/or lifetime of the device.
DISSIPATION RATINGS
PACKAGE
TSSOP – 20 (PW)
θ_JC
(°C/W)
32.3
θ_JA
(°C/W)
83 ⁽²⁾
POWER RATING⁽¹⁾
(T_J = 125°C)
T_A = 25°C
T_A = 85°C
1.2 W
0.48 W
(1) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase and
long-term reliability starts to be reduced. Thermal management of the final PCB should strive to keep the junction temperature at or
below 125°C for best performance and reliability.
(2) This data was taken with the JEDEC High-K test PCB. For the JEDEC low-K test PCB, the θ_JA is 125.8°C.
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