TL16PNP550A Datasheet, PDF (24/40 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH PLUG-AND-PLAY (PnP) AND AUTOFLOW CONTROL

TL16PNP550A
ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH PLUG-AND-PLAY (PnP) AND AUTOFLOW CONTROL
SLLS190B – MARCH 1995 – REVISED MARCH 1996
PRINCIPLES OF OPERATION
clock prescalar
The TL16PNP550A includes a clock prescalar block. The block takes the 22-MHz input clock and divides it by
a divisor read from the EEPROM at address zero. After reset, the device reads the EEPROM content at address
zero. The 2 most significant data bits of the word (2 bytes) define the divisor value as show in Table 10.
Table 10. Default Deviser Value
EEPROM LOCATION
000 (BITS 15 AND 14)
00
01
10
11
DIVISOR VALUE
12
6
3
1 (default)
The device monitors the EEPROM to check whether the divisor value has been updated or not. Read the
EEPROM interface section for more details in this mode. Note the EEPROM address location zero is reserved
for the divisor value.
EEPROM signal description (see Figure 17)
2
4
1
3
6
5
1. During and after reset, the TL16PNP550A gains access to EEPROM interface by asserting EEPROM (low).
The device reads the prescalar divisor value from address zero. After it receives the WAKE command, the
device starts receiving PnP resource data from address location 00x01H.
2. After the device is configured and leaves the configuration mode (the device is activated and it is in the wait
for key state), the TL16PNP550A releases the EEPROM interface by releasing signals EEPROM, SCLK,
SIO, and CS.
3. The on-board controller is accessing the EEPROM.
4. The TL16PNP550A assumes the prescalar divisor value has been updated.
5. The TL16PNP550A accesses the EEPROM by asserting EEPROM signal. It reads location 00 and updates
the prescalar divisor.
6. The TL16PNP550A releases the EEPROM signal and SCLK, CS and SIO signals.
If the device enters the configuration mode again (leaves the wait for key state), it gains access directly to the
EEPROM after the EEPROM signal is released.
If the EEPROM is driven by an on-board controller and the TL16PNP550A enters the configuration mode, it is
highly recommended that the controller release the EEPROM signal to allow the TL16PNP550A to gain control
of EEPROM. It is possible to deactivate and reconfigure the TL16PNP550A when it enters the configuration
mode. PNPS0 and PNPS1 terminals inform the controller when the TL16PNP550A enters the configuration
mode.
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