AM1808_1008 Datasheet, PDF (213/264 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
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6.25.3 HPI Electrical Data/Timing
SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-112. Timing Requirements for Host-Port Interface [1.3V, 1.2V, 1.1V]^{(1) (2)}
NO.
1 t_{su(SELV-HSTBL)}
2 t_{h(HSTBL-SELV)}
3 t_w(HSTBL)
4 t_w(HSTBH)
9 t_{su(SELV-HASL)}
10 t_h(HASL-SELV)
11 t_{su(HDV-HSTBH)}
12 t_h(HSTBH-HDV)
13 t_{h(HRDYL-HSTBH)}
Setup time, select signals⁽³⁾ valid before UHPI_HSTROBE low
Hold time, select signals⁽³⁾ valid after UHPI_HSTROBE low
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN
MAX
5
ns
2
ns
Pulse duration, UHPI_HSTROBE active low
15
ns
Pulse duration, UHPI_HSTROBE inactive high between consecutive accesses
2M
ns
Setup time, selects signals valid before UHPI_HAS low
5
Hold time, select signals valid after UHPI_HAS low
2
Setup time, host data valid before UHPI_HSTROBE high
5
ns
Hold time, host data valid after UHPI_HSTROBE high
2
ns
Hold time, UHPI_HSTROBE high after UHPI_HRDY low. UHPI_HSTROBE
should not be inactivated until UHPI_HRDY is active (low); otherwise, HPI writes
2
ns
will not complete properly.
16 t_{su(HASL-HSTBL)}
Setup time, UHPI_HAS low before UHPI_HSTROBE low
5
17 t_{h(HSTBL-HASH)}
Hold time, UHPI_HAS low after UHPI_HSTROBE low
2
(1) UHPI_HSTROBE refers to the following logical operation on UHPI_HCS, UHPI_HDS1, and UHPI_HDS2: [NOT(UHPI_HDS1 XOR
UHPI_HDS2)] OR UHPI_HCS.
(2) M=SYSCLK2 period in ns.
(3) Select signals include: HCNTL[1:0], HR/W and HHWIL.
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Peripheral Information and Electrical Specifications 213
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