AM1808_1008 Datasheet, PDF (135/264 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
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SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010
6.15.2 McASP Electrical Data/Timing
6.15.2.1 Multichannel Audio Serial Port 0 (McASP0) Timing
Table 6-52 and Table 6-54 assume testing over recommended operating conditions (see Figure 6-30 and
Figure 6-31).
Table 6-52. Timing Requirements for McASP0 (1.3V, 1.2V, 1.1V)^{(1) (2)}
NO.
PARAMETER
1 t_c(AHCLKRX)
2 t_w(AHCLKRX)
3 t_c(ACLKRX)
4 t_w(ACLKRX)
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
Cycle time, ACLKR/X
Pulse duration, ACLKR/W high or low
5
t_{su(AFSRX-ACLKRX)}
Setup time,
AFSR/X input to ACLKR/X ⁽⁴⁾
6 t_{h(ACLKRX-AFSRX)}
Hold time,
AFSR/X input after ACLKR/X⁽⁴⁾
7 t_{su(AXR-ACLKRX)}
Setup time,
AXR0[n] input to ACLKR/X^{(4) (5)}
8 t_{h(ACLKRX-AXR)}
Hold time,
AXR0[n] input after ACLKR/X^{(4) (5)}
AHCLKR/X ext
AHCLKR/X ext
AHCLKR/X int
AHCLKR/X ext input
AHCLKR/X ext output
AHCLKR/X int
AHCLKR/X ext input
AHCLKR/X ext output
AHCLKR/X int
AHCLKR/X ext
AHCLKR/X int
AHCLKR/X ext input
AHCLKR/X ext output
1.3V, 1.2V
MIN MAX
25
12.5
25 ⁽³⁾
12.5
11.5
4
4
-1
1
1
11.5
4
-1
3
3
1.1V
MIN MAX
28
14
28 ⁽³⁾
14
12
5
5
-2
1
1
12
5
-2
4
4
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1) ACLKX0 internal – McASP0 ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX0 external input – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX0 external output – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
ACLKR0 internal – McASP0 ACLKRCTL.CLKRM = 1, PDIR.ACLKR =1
ACLKR0 external input – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR0 external output – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
(2) P = SYSCLK2 period
(3) This timing is limited by the timing shown or 2P, whichever is greater.
(4) McASP0 ACLKXCTL.ASYNC=1: Receiver is clocked by its own ACLKR0
(5) McASP0 ACLKXCTL.ASYNC=0: Receiver is clocked by transmitter's ACLKX0
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Peripheral Information and Electrical Specifications 135
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