TMS320DM6441 Datasheet, PDF (210/229 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6441
Digital Media System-on-Chip
SPRS359B – SEPTEMBER 2006 – REVISED JANUARY 2007
www.ti.com
5.23 VLYNQ
The DM6441 VLYNQ peripheral provides a high speed serial communications interface with the following
features.
• Low pin count
• Scalable performance/support
• Simple packet based transfer protocol for memory mapped access
– Write request/data packet
– Read request packet
– Read response data packet
– Interrupt request packet
• Supports both symmetric and asymmetric operation
– Tx pins on first device connect to Rx pins on second device and vice versa
– Data pin widths are automatically detected after reset
– Request packets, response packets, and flow control information are all multiplexed and sent
across the same physical pins
– Supports both host/peripheral and peer-to-peer communication
• Simple block code packet formatting (8-b/10-b)
• In band flow control
– No extra pins needed
– Allows receiver to momentarily throttle back transmitter when overflow is about to occur
– Uses built in special code capability of block code to seamlessly interleave flow control information
with user data
– Allows system designer to balance cost of data buffering versus performance
• Multiple outstanding transactions
• Automatic packet formatting optimizations
• Internal loop-back mode
5.23.1 VLYNQ Peripheral Register Description(s)
HEX ADDRESS RANGE
0x01E0 1000
0x01E0 1004
0x01E0 1008
0x01E0 100C
0x01E0 1010
0x01E0 1014
0x01E0 1018
0x01E0 101C
0x01E0 1020
0x01E0 1024
0x01E0 1028
0x01E0 102C
0x01E0 1030
0x01E0 1034
0x01E0 1038
0x01E0 103C
Table 5-103. VLYNQ Registers
ACRONYM
-
CTRL
STAT
INTPRI
INTSTATCLR
INTPENDSET
INTPTR
XAM
RAMS1
RAMO1
RAMS2
RAMO2
RAMS3
RAMO3
RAMS4
RAMO4
REGISTER NAME
Reserved
VLYNQ Local Control Register
VLYNQ Local Status Register
VLYNQ Local Interrupt Priority Vector Status/Clear Register
VLYNQ Local Unmasked Interrupt Status/Clear Register
VLYNQ Local Interrupt Pending/Set Register
VLYNQ Local Interrupt Pointer Register
VLYNQ Local Transmit Address Map Register
VLYNQ Local Receive Address Map Size 1 Register
VLYNQ Local Receive Address Map Offset 1 Register
VLYNQ Local Receive Address Map Size 2 Register
VLYNQ Local Receive Address Map Offset 2 Register
VLYNQ Local Receive Address Map Size 3 Register
VLYNQ Local Receive Address Map Offset 3 Register
VLYNQ Local Receive Address Map Size 4 Register
VLYNQ Local Receive Address Map Offset 4 Register
210 Peripheral and Electrical Specifications
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