TMS320DM6441 Datasheet, PDF (123/229 Pages) Texas Instruments – Digital Media System-on-Chip

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TMS320DM6441
Digital Media System-on-Chip
SPRS359B – SEPTEMBER 2006 – REVISED JANUARY 2007
Table 5-28. DM6441 EDMA Registers (continued)
HEX ADDRESS
0x01c0 2684
0x01c0 2688
0x01c0 268C
0x01c0 2690
0x01c0 2694
0x01c0 2698 - 0x01c0 27FC
0x01c0 2800 - 0x01c0 29FC
0x01c0 2A00 - 0x01c0 2BFC
0x01c0 2C00 - 0x01c0 2DFC
0x01c0 2E00 - 0x01c0 2FFC
0x01c0 2FFD - 0x01c0 3FFF
0x01c0 4000 - 0x01c0 4FFF
0x01c0 5000 - 0x01c0 7FFF
0x01c0 8000 - 0x01c0 FFFF
0x01c1 0000
0x01c1 0004
0x01c1 0008 - 0x01c1 00FF
0x01c1 0100
0x01c1 0104 - 0x01c1 0110
0x01c1 0114 - 0x01c1 011F
0x01c1 0120
0x01c1 0124
0x01c1 0128
0x01c1 012C
0x01c1 0130
0x01c1 0134 - 0x01c1 013F
0x01c1 0140
0x01c1 0144 - 0x01c1 01FF
0x01c1 0200 - 0x01c1 023F
0x01c1 0240
0x01c1 0244
0x01c1 0248
0x01c1 024C
0x01c1 0250
0x01c1 0254
0x01c1 0258
0x01c1 025C
0x01c1 0260
0x01c1 0264 - 0x01c1 027F
0x01c1 0280
0x01c1 0284
0x01c1 0288
0x01c1 028C - 0x01c1 02FF
0x01c1 0300
0x01c1 0304
ACRONYM
REGISTER NAME
QEER
QDMA Event Enable Register
QEECR
QDMA Event Enable Clear Register
QEESR
QDMA Event Enable Set Register
QSER
QDMA Secondary Event Register
QSECR
QDMA Secondary Event Clear Register
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Parameter Set RAM (see Table 5-29)
-
Reserved
-
Reserved
Transfer Controller 0 Registers
-
Reserved
TCCFG
EDMA3 TC0 Configuration Register
-
Reserved
TCSTAT
EDMA3 TC0 Channel Status Register
-
Reserved
-
Reserved
ERRSTAT
EDMA3 TC0 Error Status Register
ERREN
EDMA3 TC0 Error Enable Register
ERRCLR
EDMA3 TC0 Error Clear Register
ERRDET
EDMA3 TC0 Error Details Register
ERRCMD
EDMA3 TC0 Error Interrupt Command Register
-
Reserved
RDRATE
EDMA3 TC0 Read Rate Register
-
Reserved
-
Reserved
SAOPT
EDMA3 TC0 Source Active Options Register
SASRC
EDMA3 TC0 Source Active Source Address Register
SACNT
EDMA3 TC0 Source Active Count Register
SADST
EDMA3 TC0 Source Active Destination Address Register
SABIDX
EDMA3 TC0 Source Active Source B-Index Register
SAMPPRXY
EDMA3 TC0 Source Active Memory Protection Proxy Register
SACNTRLD
EDMA3 TC0 Source Active Count Reload Register
SASRCBREF
EDMA3 TC0 Source Active Source Address B-Reference Register
SADSTBREF
EDMA3 TC0 Source Active Destination Address B-Reference Register
-
Reserved
DFCNTRLD
EDMA3 TC0 Destination FIFO Set Count Reload Register
DFSRCBREF
EDMA3 TC0 Destination FIFO Set Source Address B-Reference Register
DFDSTBREF
EDMA3 TC0 Destination FIFO Set Destination Address B-Reference
Register
-
Reserved
DFOPT0
EDMA3 TC0 Destination FIFO Options Register 0
DFSRC0
EDMA3 TC0 Destination FIFO Source Address Register 0
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