TMS320DM6441 Datasheet, PDF (135/229 Pages) Texas Instruments – Digital Media System-on-Chip

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TMS320DM6441
Digital Media System-on-Chip
SPRS359B – SEPTEMBER 2006 – REVISED JANUARY 2007
5.11 ATA/CF
The ATA/CF peripheral supports the following features:
• PIO, multiword DMA, and Ultra ATA 33/66
• Up to mode four timings on PIO mode
• Up to mode two timings on multiword DMA
• Up to mode four timings on Ultra ATA
• Programmable timing parameters
• Supports TrueIDE mode for Compact Flash
In addition, the host IDE controller supports multiword DMA transfers between external IDE/ATAPI devices
and a system memory bus interface.
5.11.1 ATA/CF Peripheral Register Description(s)
The ATA registers are shown in Table 5-36.
Table 5-36. ATA Register Memory Map
HEX ADDRESS RANGE
0x01C6 6000
0x01C6 6002
0x01C6 6004
0x01C6 6008
0x01C6 600A
0x01C6 600C
0x01C6 6040
0x01C6 6042
0x01C6 6044
0x01C6 6045
0x01C6 6047
0x01C6 6048
0x01C6 604A
0x01C6 6050
0x01C6 6054
0x01C6 6058
0x01C6 605C
0x01C6 6060
0x01C6 6064
0x01C6 6068
0x01C6 606C
0x01C6 6070
0x01C6 6074
0x01C6 6078
0x01C6 607C - 0x01C6 67FF
ACRONYM REGISTER NAME
ATA Bus Master Interface DMA Engine Registers
BMICP
Primary IDE Channel DMA Control Register
BMISP
Primary IDE Channel DMA Status Register
BMIDTP
Primary IDE Channel DMA Descriptor Table Pointer Register
-
-
Reserved
-
ATA Configuration Registers
IDETIMP
Primary IDE Channel Timing Register
-
-
Reserved
-
IDESTAT
IDE Controller Status Register
UDMACTL Ultra-DMA Control Register
-
Reserved
MISCCTL Miscellaneous Control Register
REGSTB
Task File Register Strobe Timing Register
REGRCVR Task File Register Recovery Timing Register
DATSTB
Data Register Access PIO Strobe Timing Register
DATRCVR Data Register Access PIO Recovery Timing Register
DMASTB
Multiword DMA Strobe Timing Register
DMARCVR Multiword DMA Recovery Timing Register
UDMASTB Ultra-DMA Strobe Timing Register
UDMATRP Ultra-DMA Ready-to-Pause Timing Register
UDMATENV Ultra-DMA Timing Envelope Register
IORDYTMP Primary IO Ready Timer Configuration Register
-
Reserved
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Peripheral and Electrical Specifications 135