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TMS320DM647_10 Datasheet, PDF (156/181 Pages) Texas Instruments – Digital Media Processor
TMS320DM647
TMS320DM648
SPRS372F – JANUARY 2010 – REVISED SEPTEMBER 2009
www.ti.com
• EtherStats and 802.3 Stats RMON statistics gathering (shared)
• Programmable statistics interrupt mask when a statistic is above one half its 32-bit value
– MDIO module for PHY management
– SGMII gigabit current mode logic (CML) differential SERializer/DESerializer (SerDes) I/O
receiver/transmitters
• Adaptive active equalization for superior data dependent jitter tolerance in the presence of a
lossy channel
• Loss of signal detector with programmable threshold levels in receive channels
• Integrated receiver and transmitter termination
• IEEE 802.3 gigabit Ethernet conformant
6.19.1 Ethernet Subsystem Functions
Configuration
Bus
Peripheral
Bus
DSP
Interrupt
Controller
Configuration
Bus
Configuration
Registers
Host DMA
Controller
Buffer
Descriptor
Memory
3 -port
Gigabit
Switch
Gigabit
MAC 0
GMII port 0 SGMII 0
Addr Lookup
Engine
Gigabit
MAC 1
GMII port 1 SGMII 1(A)
2
SGMII
2
Port 0
2
REFCLK
2
SGMII
2
Port 1
MDIO
MII
Serial
Mgmt
A. SGMII port 1 is not available on DM647.
Figure 6-51. Ethernet Subsystem Block Diagram
The Ethernet Subsystem conforms to the IEEE 802.3-2002 standard. Deviating from this standard, the
GMAC module does not use the transmit coding error signal MTXER. Instead of driving the error pin when
an underflow condition occurs on a transmitted frame, the GMAC generates an incorrect checksum by
inverting the frame CRC, so that the transmitted frame will be detected as an error by the network.
In networking systems, packet transmission and reception are critical tasks. The communications port
programming interface (CPPI) protocol maximizes the efficiency of interaction between the host software
and communications modules. The CPPI block contains 2048 words of 32-bit buffer descriptor memory
that holds up to 512 buffer descriptors.
After reset, initialization, configuration, and auto-negotiation, the host C64x+ DSP may initiate Ethernet
transmit and receive operations.
156 Peripheral Information and Electrical Specifications
Copyright © 2010–2009, Texas Instruments Incorporated
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