TMS320DM647_10 Datasheet, PDF (138/181 Pages) Texas Instruments – Digital Media Processor

TMS320DM647
TMS320DM648
SPRS372F – JANUARY 2010 – REVISED SEPTEMBER 2009
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HAS (input)
15
16
HCNTL[1:0] (input)
HR/W (input)
13
HSTROBE^(A) (input)
37
HCS (input)
1
3
2
HD[31:0] (output)
38
7
6
4
HRDY^(B) (output)
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT (HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with
auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed
information on the HPI peripheral, see the TMS320DM647/DM648 DSP Host Port Interface (HPI) User's Guide
(literature number SPRUEL5)
Figure 6-44. HPI32 Read Timing (HAS Not Used, Tied High)
138 Peripheral Information and Electrical Specifications
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