CDC5801 Datasheet, PDF (15/16 Pages) Texas Instruments – LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT

DBQ (R–PDSO–G**)
CDC5801
LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH
PROGRAMMABLE DELAY AND PHASE ALIGNMENT
SCAS682A – OCTOBER 2002
MECHANICAL DATA
PLASTIC SMALL–OUTLINE PACKAGE
0.025 (0,64)
24
0.012 (0,30)
0.008 (0,20)
13
0.005 (0,13)
0.157 (3,99) 0.244 (6,20)
0.150 (3,81) 0.228 (5,80)
0.008 (0,20) NOM
1
12
A
0.069 (1,75) MAX
Gauge Plane
0°–8°
0.010 (0,25)
0.035 (0,89)
0.016 (0,40)
0.010 (0,25)
0.004 (0,10)
Seating Plane
0.004 (0,10)
PINS **
16
DIM
A MAX
0.197
(5,00)
A MIN
0.189
(4,80)
20
0.344
(8,74)
0.337
(8,56)
24
28
0.344 0.394
(8,74) (10,01)
0.337 0.386
(8,56) (9,80)
D
M0–137
VARIATION
AB
AD
AE
AF
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO–137.
4073301/F 02/02
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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