CDC5801 Datasheet, PDF (12/16 Pages) Texas Instruments – LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT

CDC5801
LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH
PROGRAMMABLE DELAY AND PHASE ALIGNMENT
SCAS682A – OCTOBER 2002
PARAMETER MEASUREMENT INFORMATION
CLKOUTB
CLKOUT
tcycle,i
tcycle,i+1
Cycle-to-Cycle Jitter = | tcycle,i – tcycle,i+r| Over 1000 Consecutive Cycles
Figure 2. Cycle-to-Cycle Jitter
CLKOUT
CLKOUTB
tpw+
tcycle
Duty Cycle = (tpw+/tcycle)
Figure 3. Output Duty Cycle
CLKOUT
CLKOUTB
Figure 4. Crossing-Point Voltage
VX+
VX, _nom
VX_–
80%
20%
tr
VOH
VOL
tf
Figure 5. Voltage Waveforms
PWRDNB
ÎÎÎÎÎÎÎÎ _CLKOUT/
ÎÎÎÎÎÎÎÎ ^CLKOUTB
t(power _up)
Figure 6. PWRDNB Transition Timings
ÎÎÎÎ^{t(power down)}
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