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DRV5013_15 Datasheet, PDF (13/27 Pages) Texas Instruments – DRV5013 Digital-Latch Hall Effect Sensor
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Feature Description (continued)
VCC
DRV5013
SLIS150C – MARCH 2014 – REVISED SEPTEMBER 2014
t (s)
B (mT)
BOP
BRP
t (s)
OUT
Valid Output
t (s)
ton
td
Figure 16. Case 4: Power On When BRP < B < BOP, Followed by B < BRP
8.3.4 Output Stage
The DRV5013 output stage uses an open-drain NMOS, and it is rated to sink up to 30 mA of current. For proper
operation, calculate the value of the pullup resistor R1 using Equation 1.
Vref max @ R1 @ Vref min
30 mA
100 µA
(1)
The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current
is generally better, however faster transitions and bandwidth require a smaller resistor for faster switching.
In addition, ensure that the value of R1 > 500 Ω to ensure the output driver can pull the OUT terminal close to
GND.
NOTE
Vref is not restricted to VCC. The allowable voltage range of this terminal is specified in the
Absolute Maximum Ratings.
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