DRV5013_15 Datasheet, PDF (11/27 Pages) Texas Instruments – DRV5013 Digital-Latch Hall Effect Sensor

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DRV5013
SLIS150C – MARCH 2014 – REVISED SEPTEMBER 2014
Feature Description (continued)
8.3.3 Power-On Time
After applying V_CC to the DRV5013 device, t_on must elapse before the OUT terminal is valid. During the power-up
sequence, the output is Hi-Z. A pulse as shown in Figure 13 and Figure 14 occurs at the end of t_on. This pulse
can allow the host processor to determine when the DRV5013 output is valid after startup. In Case 1 (Figure 13)
and Case 2 (Figure 14), the output is defined assuming a constant magnetic field B > B_OP and B < B_RP.
V_CC
t (s)
B (mT)
B_OP
B_RP
t (s)
OUT
Valid Output
t (s)
t_on
Figure 13. Case 1: Power On When B > B_OP
V_CC
t (s)
B (mT)
B_OP
B_RP
t (s)
OUT
Valid Output
t (s)
t_on
Figure 14. Case 2: Power On When B < B_RP
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