TMS320C6421_0711 Datasheet, PDF (127/223 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

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EDMA
CHANNEL
12
13
14
15
16-21
22
23
24
25
26
27
28
29
30-31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55-63
TMS320C6421
Fixed-Point Digital Signal Processor
SPRS346C – JANUARY 2007 – REVISED NOVEMBER 2007
Table 6-6. C6421 EDMA Channel Synchronization Events (continued)
EVENT NAME
AXEVT0
AREVTE0
AREVTO0
AREVT0
–
URXEVT0
UTXEVT0
–
–
–
–
ICREVT
ICXEVT
–
GPINT0
GPINT1
GPINT2
GPINT3
GPINT4
GPINT5
GPINT6
GPINT7
GPBNKINT0
GPBNKINT1
GPBNKINT2
GPBNKINT3
GPBNKINT4
GPBNKINT5
GPBNKINT6
–
TEVTL0
TEVTH0
TEVTL1
TEVTH1
PWM0
PWM1
PWM2
–
EVENT DESCRIPTION
McASP0 Transmit Event
McASP0 Receive Event Even
McASP0 Receive Event Odd
McASP0 Receive Event
Reserved
UART 0 Receive Event
UART 0 Transmit Event
Reserved
Reserved
Reserved
Reserved
I2C Receive Event
I2C Transmit Event
Reserved
GPIO 0 Interrupt
GPIO 1 Interrupt
GPIO 2 Interrupt
GPIO 3 Interrupt
GPIO 4 Interrupt
GPIO 5 Interrupt
GPIO 6 Interrupt
GPIO 7 Interrupt
GPIO Bank 0 Interrupt
GPIO Bank 1 Interrupt
GPIO Bank 2 Interrupt
GPIO Bank 3 Interrupt
GPIO Bank 4 Interrupt
GPIO Bank 5 Interrupt
GPIO Bank 6 Interrupt
Reserved
Timer 0 Event Low Interrupt
Timer 0 Event High Interrupt
Timer 1 Event Low Interrupt
Timer 1 Event High Interrupt
PWM 0 Event
PWM 1 Event
PWM 2 Event
Reserved
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Peripheral Information and Electrical Specifications 127