SLUA110 Datasheet, PDF (12/19 Pages) Texas Instruments – PRACTICAL CONSIDERATIONS IN CURRENT MODE POWER SUPPLIES

APPLICATION NOTE
C. LATCHING
Figure 32.
Soft Start
Upon power-up, it is desirable to gradually widen the PWM
pulse width starting at zero duty cycle. On PWMs without
an internal soft start control, this can be implemented exter-
nally with three components. An R/C network is used to
provide the time constant to control the I limit input or error
amplifier output. A transistor is also used to isolate the com-
ponents from the normal operation of either node. It also
minimizes the loading effects on the R/C time constant by
amplification through the transistors gain.
U-111
Variable Frequency Operation
Certain topologies and control schemes require the use of
a variable frequency oscillator in the controlling element.
However, most PWMs are designed to operate in a fixed
frequency mode of operation. A simple circuit is presented
to disable the ICs internal oscillator between pulses, thus
allowing variable frequency operation.
Internal at the ICs timing resistor (Rt) terminal is a current
mirror The current flowing through Rt is duplicated at the
Ct terminal during the charge cycle, or “on” time. When the
Rt terminal is raised to V ref (5 volts), the current mirror is
turned off, and the oscillator is disabled. This is easily
switched by a transistor and external logic as the control
element, for example, a pulse generator. The PWM’s timing
resistor and capacitor should be selected for the maximum
“ON” time and minimum “DEAD” time of the PWM
output(s). The rate at which the PWM oscillator is disabled
determines the frequency of the output(s).
The frequency can be varied in two distinct fashions
depending on the desired control mode and trigger
source. The “off” time of both outputs will occur on a pulse-
by-pulse basis when the PWM outputs are OR’d to the trig-
ger source. In this configuration either output initiates the
“off” time, triggered by its falling edge. The PWM output A
is activated, then both outputs A and B are low during the
“off” time of the pulse generator. This is followed by output
B being activated, then both outputs A and B low again
during the next “off” time. This cycle repeats itself at a fre-
quency determined by the pulse generator circuitry.
Another method is to introduce the “off” time after two
(alternate A, then B) output pulses. Output A is activated,
followed immediately by output B, then the desired “off”
time. The pulse generator circuitry is triggered by the
PWM’s falling edge of output B. The specific control
scheme utilized will depend on the power supply topology
and control requirements.
B. USING E/A
Figure 33.
Figure 34. Oscillator Disable Circuit
Variable Frequency Operation
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