SM39R08A5 Datasheet, PDF (37/58 Pages) SyncMOS Technologies,Inc – Additional Baud Rate Generator

SM39R08A5
8-Bit Micro-controller
with 8KB Flash
& 256B RAM embedded
Interrupt Enable 1 register (IEN1)
Mnemonic: IEN1
7
6
-
-
5
IEIIC
4
IELVI
Address: B8h
3
2
1
0
Reset
-
IEADC
-
IEPWM ^00h
IELVI: LVI interrupt enable.
IELVI = 0 – Disable LVI interrupt.
IELVI = 1 – Enable LVI interrupt.
IEIIC: IIC interrupt enable.
IEIICS = 0 – Disable IIC interrupt.
IEIICS = 1 – Enable IIC interrupt.
IEADC: A/D converter interrupt enable
IEADC = 0 – Disable ADC interrupt.
IEADC = 1 – Enable ADC interrupt.
IEPWM: PWM interrupt enable.
IEPWM = 0 – Disable PWM interrupt.
IEPWM = 1 – Enable PWM interrupt.
Interrupt Enable 2 register (IEN2)
Mnemonic: IEN2
Address: 9Ah
7
6
5
4
3
2
1
0
Reset
-
-
-
-
-
ECmpI IEWDT
-
00H
ECmpI: Enable Comparator 0 interrupt
IEWDT: WDT interrupt enable.
IEWDT = 0 – Disable WDT interrupt.
IEWDT = 1 – Enable WDT interrupt.
Interrupt request register (IRCON)
Mnemonic: IRCON
7
6
-
-
5
IICIF
4
LVIIF
Address: C0h
3
2
1
0
Reset
-
ADCIF
-
PWMIF 00H
LVIIF: LVI interrupt flag. Clear by hardware automatically
IICIF: IIC interrupt flag. Clear by hardware automatically
ADCIF: A/D converter end interrupt flag.
PWMIF: PWM interrupt flag. Clear by hardware automatically
Interrupt request register 2 (IRCON2)
Mnemonic: IRCON2
Address: 97h
7
6
5
4
3
2
1
0
Reset
-
-
-
-
-
CmpIF WDTIF
-
00H
CmpIF: Comparator interrupt flag
HW will clear this flag automatically when enter interrupt vector.
SW can clear this flag also.(in case analog comparator INT disable)
WDTIF: WDT interrupt flag.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M067
Ver E SM39R08A5 06/30/2015
- 37 -