SM39R08A5 Datasheet, PDF (12/58 Pages) SyncMOS Technologies,Inc – Additional Baud Rate Generator

SM39R08A5
8-Bit Micro-controller
with 8KB Flash
& 256B RAM embedded
clear by software.
LVRF: Low voltage reset flag.
When MCU is reset by LVR, LVRF flag will be set to one by hardware. This flag clear by
software.
PORF: Power on reset flag.
When MCU is reset by POR, PORF flag will be set to one by hardware. This flag clear
by software.
1.5.4. Time Access Key register (TAKEY)
Mnemonic: TAKEY
Address: F7H
7
6
5
4
3
2
1
0
Reset
TAKEY [7:0]
00H
Software reset register (SWRES) is read-only by default; software must write three specific values
55h, AAh and 5Ah sequentially to the TAKEY register to enable the SWRES register write attribute. That
is:
MOV TAKEY, #55h
MOV TAKEY, #0AAh
MOV TAKEY, #5Ah
1.5.5. Software Reset register (SWRES)
Mnemonic: SWRES
Address: E7H
7
6
5
4
3
2
1
0
Reset
SWRES [7:0]
00H
SWRES [7:0]: Software reset register bit. These 8-bit is self-reset at the end of the reset procedure.
SWRES [7:0] = FFh, software reset.
SWRES [7:0] = 00h ~ FEh, MCU no action.
1.5.6. Example of software reset
MOV TAKEY, #55h
MOV TAKEY, #0AAh
MOV TAKEY, #5Ah ; enable SWRES write attribute
MOV SWRES, #0FFh ; software reset MCU
1.6. Clocks
The default clock is the 22.1184MHz Internal OSC. This clock is used during the initialization stage. The major work of the
initialization stage is to determine the clock source used in normal operation.
The internal clock sources are from the internal OSC with difference frequency division as given in Table 1-1, the clock
source can set by writer or ICP.
Table 1-1: Selection of clock source
Clock source
22.1184MHz from internal OSC
11.0592MHz from internal OSC
5.5296MHz from internal OSC
2.7648MHz from internal OSC
1.3824MHz from internal OSC
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M067
Ver E SM39R08A5 06/30/2015
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