TDA7590_09 Datasheet, PDF (9/42 Pages) STMicroelectronics – Digital signal processing IC for speech and audio applications

TDA7590
Pin description
Table 2. Pin function (continued)
N°
Name
Type
Description
25
DAC1
O DAC1 left single analog output.
26
DAC0M
O DAC0 negative right differential analog output.
27
DAC0P
O DAC0 positive right differential analog output.
28
CODEC_VSS
I Voltage ground.
29
REF0
I Codec power supply.
30
CODEC_VDD
I Codec reference.
31
ADC1
I ADC1 left single analog input.
32
ADC0M
33
ADC0P
I DAC0 negative right differential analog inputs.
I DAC0 positive right differential analog inputs.
36
EXTDACLK
37
XTI
I
External DAC clock. Optional external clock source from which LRCLK and
SCLK can be generated.
I Crystal oscillator input. External clock input or crystal connection.
38
XTO
O Crystal oscillator output. Crystal oscillator output drive.
39
PLL_VDD
I PLL power supply.
40
PLL_VSS
I PLL ground input.
Host data strobe. Polarity programmable Host data strobe input for single
41
HDS
I/O strobe mode. Polarity programmable Host write strobe input for double strobe
mode.
Host read/write. Host read/write for single strobe bus mode.
42
HRW
I/O
Polarity programmable Host read data strobe for double strobe mode.
Host acknowledge. Polarity programmable host interrupt acknowledge for
43
HACK
I/O single host request mode. Polarity programmable host receive request
interrupt for double host request mode.
Host request. Polarity programmable host request interrupt for single host
44
HREQ
I/O request mode. Polarity programmable host transfer request interrupt for
double host request mode.
45
IOVDD
I IO power supply.
46
IOVSS
I IO ground.
Host chip select. Polarity programmable host chip select for non-multiplexed
47
HCS
I/O mode.
Host address Line 10 for multiplexed mode.
48
HA9
I/O
Host address 9. Address line 9 in multiplexed mode otherwise address line 2
in non-multiplexed mode.
49
HA8
I/O
Host address 8. Address line 8 in multiplexed mode otherwise address line 1
in non-multiplexed mode.
50
HAS
I/O
Host address strobe. Address strobe for multiplexed bus or Address 0 for non
multiplexed.
51
HAD[7]
I/O
Host 8-bit data line 7. Host data bus and/or address lines when in multiplexed
mode.
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