TDA7590_09 Datasheet, PDF (27/42 Pages) STMicroelectronics – Digital signal processing IC for speech and audio applications

TDA7590
essi0_tde equ
$36
essi0_tue equ
$38
essi0_tls equ
$3a
;ESSI 1 interrupt equates
essi1_rdf equ
$40
essi1_roe equ
$42
essi1_rls equ
$44
essi1_tde equ
$46
essi1_tue equ
$48
essi1_tls equ
$4a
;Register Addresses of ESSI0
M_TX00
EQU
$FFFFBC
M_TX01
EQU
$FFFFBB
M_TX02
EQU
$FFFFBA
M_TSR0
EQU
$FFFFB9
M_RX0
EQU
$FFFFB8
M_SSISR0
EQU
$FFFFB7
M_CRB0
EQU
$FFFFB6
M_CRA0
EQU
$FFFFB5
M_TSMA0
EQU
$FFFFB4
M_TSMB0
EQU
$FFFFB3
M_RSMA0
EQU
$FFFFB2
M_RSMB0
EQU
$FFFFB1
; SSI0 Transmit Data Register 0
; SSI0 Transmit Data Register 1
; SSI0 Transmit Data Register 2
; SSI0 Time Slot Register
; SSI0 Receive Data Register
; SSI0 Status Register
; SSI0 Control Register B
; SSI0 Control Register A
; SSI0 Transmit Slot Mask Register A
; SSI0 Transmit Slot Mask Register B
; SSI0 Receive Slot Mask Register A
; SSI0 Receive Slot Mask Register B
;Register Addresses of ESSI1
M_TX10
EQU
$FFFFAC
M_TX11
EQU
$FFFFAB
M_TX12
EQU
$FFFFAA
M_TSR1
EQU
$FFFFA9
M_RX1
EQU
$FFFFA8
M_SSISR1
EQU
$FFFFA7
M_CRB1
EQU
$FFFFA6
M_CRA1
EQU
$FFFFA5
M_TSMA1
EQU
$FFFFA4
M_TSMB1
EQU
$FFFFA3
M_RSMA1
EQU
$FFFFA2
M_RSMB1
EQU
$FFFFA1
; SSI1 Transmit Data Register 0
; SSI1 Transmit Data Register 1
; SSI1 Transmit Data Register 2
; SSI1 Time Slot Register
; SSI1 Receive Data Register
; SSI1 Status Register
; SSI1 Control Register B
; SSI1 Control Register A
; SSI1 Transmit Slot Mask Register A
; SSI1 Transmit Slot Mask Register B
; SSI1 Receive Slot Mask Register A
; SSI1 Receive Slot Mask Register B
;------------------------------------------------------------------------
;
EQUATES for SCI
;------------------------------------------------------------------------
PCRE_ADR
EQU
$FFFF9F
; Serial Port Control Register
PRRE_ADR
EQU
$FFFF9E
; Serial Port Direction Register
PDRE_ADR
EQU
$FFFF9D
; Serial Port Direction Register
SCR_ADR
EQU
$FFFF9C
; SCI Control Register
SCCR_ADR
EQU
$FFFF9B
; SCI Clock Control Register
SRXH_ADR
EQU
$FFFF9A
; Serial Recieve Register high
SRXM_ADR
EQU
$FFFF99
; Serial Recieve Register mid
SRXL_ADR
EQU
$FFFF98
; Serial Recieve Register low
STXH_ADR
EQU
$FFFF97
; Serial Transmit Register high
STXM_ADR
EQU
$FFFF96
; Serial Transmit Register mid
STXL_ADR
EQU
$FFFF95
; Serial Transmit Register low
STXA_ADR
EQU
$FFFF94
; Serial Transmit Adress Register
SSR_ADR
EQU
$FFFF93
; Serial Status Register
Appendix 1
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