TDA7590_09 Datasheet, PDF (28/42 Pages) STMicroelectronics – Digital signal processing IC for speech and audio applications

Appendix 1
TDA7590
;------------------------------------------------------------------------
;
EQUATES for Expansion Port
;------------------------------------------------------------------------
EXP_BCR
EQU
$FFFFFB
; Bus Control Register address
EXP_AAR0
EQU
$FFFFF9
; Address Attribte Register (AAR0) address
EXP_AAR1
EQU
$FFFFF8
; Address Attribte Register (AAR1) address
EXP_AAR2
EQU
$FFFFF7
; Address Attribte Register (AAR2) address
EXP_AAR3
EQU
$FFFFF6
; Address Attribte Register (AAR3) address
EXT_RAM_STARTEQU
$C00000
;------------------------------------------------------------------------
;
EQUATES for Extended Memory
;------------------------------------------------------------------------
EOC_ADR
EQU
$FFFFCA
;*******************************************************************************
;***************************** Initialisation Values **************************
;*******************************************************************************
;-------------------------------------------------------------------------------
;
CODEC Intitialisation values
;-------------------------------------------------------------------------------
; --- INIT_CCR -----------------------------------------------------------------
; settings fro the CODEC Control Register
;
321098765432109876543210
INIT_CODEC_CSR EQU %000000001110011011011011 ; $00E6DB DACgain = 0dB - ADCgain = +0dBdB
;
011 --- GADCL[0:2]
;
011 ------ GADCR[0:2]
;
011 --------- GDACL[0:2]
;
011 ------------ GDACR[0:2]
;
0 --------------- MUTEDAC (1=Mute)
;
1 ---------------- PDNDAC (1=pwrdwn)
;
1 ----------------- PDNADC (1=pwrdwn)
;
1 ------------------ NRST (0=reset)
;-------------------------------------------------------------------------------
;
SAI Intitialisation values
;-------------------------------------------------------------------------------
;--- INIT_RCS ------------------------------------------------------------------
; settings for the Receiver Control/Status Register
;
321098765432109876543210
INIT_SAI_RCS EQU %000000000001000101001001 ; $000149
;
1 --- R0EN (0:Disbaled; 1:Enabled)
;
0 ---- R1EN (0:Disbaled; 1:Enabled)
;
0 ----- R2EN (0:Disbaled; 1:Enabled)
;
1 ------ RMME (1:Master mode; 0:Slave mode)
;
0 ------- Reserved
;
10 -------- RWL[0:1] (00:16; 01:24; 10:32)
;
0 ---------- RDIR (0:MSB 1st; 1:LSB 1st)
;
1 ----------- RLRS (0:LRCKR=0-LW; 1:LRCKR=0-RW)
;
0 ------------ RCKP (0:-ve ; 1:+ve)
;
0 ------------- RREL (0:trans-1st; 1:I2S)
;
0 -------------- RDWJ
;
1 --------------- RXIE (0:Disabled; 1:Enabled)
;
0 ---------------- Reserved
;
0 ----------------- ROFL
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