STE2001 Datasheet, PDF (9/36 Pages) STMicroelectronics – 65 X 128 SINGLE CHIP LCD CONTROLLER / DRIVER

STE2001
Figure 6. Data RAM Byte organization with D0 = 0
MSB
LSB
0123
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
124 125 126 127
D00IN1142
Figure 7. Data RAM Byte organization with D0 = 1
LSB
MSB
0123
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
124 125 126 127
D00IN1143
Figure 8. Output drivers rows and physical memory rows correspondence with MY =0
ROW DRIVER PHYSICAL MEMORY ROW
0123
R0
ROW 0
R1
ROW 1
R2
ROW 2
R3
ROW 3
R4
ROW 4
R5
ROW 5
124 125 126 127
R 60
R 61
R 62
R 63
R 64
ROW 60
ROW 61
ROW 62
ROW 63
ROW 64
D00IN1144
Figure 9. Output drivers rows and physical memory rows correspondence with MY =1
ROW DRIVER PHYSICAL MEMORY ROW
R 63
R 62
R 61
R 60
R 59
R 58
0123
ROW 0
ROW 1
ROW 2
ROW 3
ROW 4
ROW 5
124 125 126 127
R3
R2
R1
R0
R 64
ROW 60
ROW 61
ROW 62
ROW 63
ROW 64
D00IN1145
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