STE2001 Datasheet, PDF (21/36 Pages) STMicroelectronics – 65 X 128 SINGLE CHIP LCD CONTROLLER / DRIVER

STE2001
Parallel Interface
The STE2001 parallel Interface is a unidirectional link between the display driver and the application supervisor.
It consists of ten lines: eight data lines (from DB7 to DB0) and two control lines. The control lines are: enable
(E) for data latch and PD/C for mode selection.
The data lines and the control line values are internally latched on E rising edge (fig. 23).
Figure 23. Parallel interface timing
PD/C
E
DB0-DB7
tSU(A)
tW(en)
t_h(A)
t_SU(D) t_HO(D)
t_CY(en)
RES
t_START
D00IN1162
Table 1. Instruction Set
Instruction
D/C R/W
Description
B7 B6 B5 B4 B3 B2 B1 B0
H=0 or H=1
NOP
0000000000
No Operation
Function Set
0 0 0 0 1 MX MY PD V H Power Down Management; Entry
Mode; Extended Instruction Set
Read Status Byte 0 1 PD TRS BRS D E MX MY DO
( I²C interface only )
Write Data
1 0 D7 D6 D5 D4 D3 D2 D1 D0
Writes data to RAM
H=0
Memory Blank
0 0 0 0 0 0 0 0 0 1 Starts Memory Blank Procedure
Scroll
0 0 0 0 0 0 0 0 1 DIR Scrolls by one Row UP or DOWN
V_LCD Range Setting 0 0 0 0 0 0 0 1 0 PRS V_LDC programming range selection
Display Control
0 0 0 0 0 0 1D0E
Select Display Configuration
Set CP Factor
0 0 0 0 0 1 0 0 S1 S0 Charge Pump Multiplication Factor
Set RAM Y
0 0 0 1 0 0 Y3 Y2 Y1 Y0 Set Horizontal (Y) RAM Address
Set RAM X
0 0 1 X6 X5 X4 X3 X2 X1 X0 Set Vertical (X) RAM Address
H=1
Checker Board
0 0 0 0 0 0 0 0 0 1 Starts Checker Board Procedure
Multiplex Select 0 0 0 0 0 0 0 0 1 MUX
Selects MUX factor
TC Select
0 0 0 0 0 0 0 1 TC1 TC0 Set Temperature Coefficient for V_LDC
Output Address 0 0 0 0 0 0 1 DO TRS BRS Set Row Order on Output Pads
Bias Ratios
0 0 0 0 0 1 0 BS2 BS1 BS0
Set desired Bias Ratios
Reserved
0 0 0 1 XXXXXX
Not to be used
Set V_OP
0 0 1 OP6 OP5 OP4 OP3 OP2 OP1 OP0 V_OP register Write instruction
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