RM0367 Datasheet, PDF (574/1009 Pages) STMicroelectronics – This reference manual targets application developers

RM0367
General-purpose timers (TIM21/22)
Input capture mode
Bits 15:12 IC2F: Input capture 2 filter
Bits 11:10 IC2PSC[1:0]: Input capture 2 prescaler
Bits 9:8 CC2S: Capture/compare 2 selection
This bitfield defines the direction of the channel (input/output) as well as the used input.
00: CC2 channel is configured as output
01: CC2 channel is configured as input, IC2 is mapped on TI2
10: CC2 channel is configured as input, IC2 is mapped on TI1
11: CC2 channel is configured as input, IC2 is mapped on TRC. This mode works only if an
internal trigger input is selected through the TS bit (TIMx_SMCR register)
Note: The CC2S bits are writable only when the channel is OFF (CC2E = 0 in TIMx_CCER).
Bits 7:4 IC1F: Input capture 1 filter
This bitfield defines the frequency used to sample the TI1 input and the length of the digital
filter applied to TI1. The digital filter is made of an event counter in which N consecutive
events are needed to validate a transition on the output:
0000: No filter, sampling is done at f_DTS
0001: f_SAMPLING=f_{CK_INT}, N=2
0010: f_SAMPLING=f_{CK_INT}, N=4
0011: f_SAMPLING=f_{CK_INT}, N=8
0100: f_SAMPLING=f_DTS/2, N=6
0101: f_SAMPLING=f_DTS/2, N=8
0110: f_SAMPLING=f_DTS/4, N=6
0111: f_SAMPLING=f_DTS/4, N=8
1000: f_SAMPLING=f_DTS/8, N=6
1001: f_SAMPLING=f_DTS/8, N=8
1010: f_SAMPLING=f_DTS/16, N=5
1011: f_SAMPLING=f_DTS/16, N=6
1100: f_SAMPLING=f_DTS/16, N=8
1101: f_SAMPLING=f_DTS/32, N=5
1110: f_SAMPLING=f_DTS/32, N=6
1111: f_SAMPLING=f_DTS/32, N=8
Bits 3:2 IC1PSC: Input capture 1 prescaler
This bitfield defines the ratio of the prescaler acting on the CC1 input (IC1).
The prescaler is reset as soon as CC1E=’0’ (TIMx_CCER register).
00: no prescaler, capture is done each time an edge is detected on the capture input
01: capture is done once every 2 events
10: capture is done once every 4 events
11: capture is done once every 8 events
Bits 1:0 CC1S: Capture/Compare 1 selection
This bitfield defines the direction of the channel (input/output) as well as the used input.
00: CC1 channel is configured as output
01: CC1 channel is configured as input, IC1 is mapped on TI1
10: CC1 channel is configured as input, IC1 is mapped on TI2
11: CC1 channel is configured as input, IC1 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
Note: The CC1S bits are writable only when the channel is OFF (CC1E = 0 in TIMx_CCER).
DocID025274 Rev 3
574/1009
581