RM0367 Datasheet, PDF (248/1009 Pages) STMicroelectronics – This reference manual targets application developers

RM0367
General-purpose I/Os (GPIO)
9.4.5
GPIO port input data register (GPIOx_IDR) (x = A..E and H)
Address offset: 0x10
Reset value: 0x0000 XXXX (where X means undefined)
31
Res.
30
Res.
29
Res.
28
Res.
27
Res.
26
Res.
25
Res.
24
Res.
23
Res.
22
Res.
21
Res.
20
Res.
19
Res.
18
Res.
17
Res.
16
Res.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ID15 ID14 ID13 ID12 ID11 ID10 ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
r
r
r
r
r
r
r
r
r
r
r
r
r
r
r
r
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 IDy: Port input data bit (y = 0..15)
These bits are read-only. They contain the input value of the corresponding I/O port.
9.4.6
GPIO port output data register (GPIOx_ODR) (x = A..E and H)
Address offset: 0x14
Reset value: 0x0000 0000
31
Res.
30
Res.
29
Res.
28
Res.
27
Res.
26
Res.
25
Res.
24
Res.
23
Res.
22
Res.
21
Res.
20
Res.
19
Res.
18
Res.
17
Res.
16
Res.
15
OD15
rw
14
OD14
rw
13
OD13
rw
12
OD12
rw
11
OD11
rw
10
OD10
rw
9
OD9
rw
8
OD8
rw
7
OD7
rw
6
OD6
rw
5
OD5
rw
4
OD4
rw
3
OD3
rw
2
OD2
rw
1
OD1
rw
0
OD0
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 ODy: Port output data bit (y = 0..15)
These bits can be read and written by software.
Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the
GPIOx_BSRR or GPIOx_BRR registers (x = A..E).
9.4.7
GPIO port bit set/reset register (GPIOx_BSRR) (x = A..E and H)
Address offset: 0x18
Reset value: 0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
BR15 BR14 BR13 BR12 BR11 BR10 BR9 BR8 BR7 BR6 BR5 BR4 BR3 BR2 BR1 BR0
w
w
w
w
w
w
w
w
w
w
w
w
w
w
w
w
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BS15 BS14 BS13 BS12 BS11 BS10 BS9 BS8 BS7 BS6 BS5 BS4 BS3 BS2 BS1 BS0
w
w
w
w
w
w
w
w
w
w
w
w
w
w
w
w
DocID025274 Rev 3
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