LSM303D Datasheet, PDF (41/52 Pages) STMicroelectronics – Embedded temperature sensor

LSM303D
Register description
FM2
0
0
0
0
1
FM1
0
0
1
1
0
Table 59. FIFO mode configuration
FM0
FIFO mode
0
Bypass mode
1
FIFO mode
0
Stream mode
1
Stream-to-FIFO mode
0
Bypass-to-Stream mode
Interrupt generator 2 can change the FIFO mode.
8.29
FIFO_SRC (2Fh)
FiFO status register.
Table 60. FIFO_SRC register
FTH
OVRN
EMPTY FSS4
FSS3
FSS2
FSS1
FSS0
FTH
OVRN
EMPTY
FSS[4:0]
Table 61. FIFO_SRC register description
FIFO threshold status.
FTH bit is set to ‘1’ when FIFO content exceeds threshold level.
FIFO overrun status.
OVRN bit is set to ‘1’ when FIFO buffer is full.
Empty status.
EMPTY bit is set to ‘1’ when all FIFO samples have been read and FIFO is empty.
FIFO stored data level.
FSS4-0 bits contain the current number of unread FIFO levels.
8.30
IG_CFG1 (30h)
Inertial interrupt generator 1 configuration register.
AOI
6D
Table 62. IG_CFG1 register
ZHIE/
ZUPE
ZLIE/
YHIE/
ZDOWNE YUPE
YLIE/
XHIE/
YDOWNE XUPE
XLIE/
XDOWNE
DocID023312 Rev 2
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