LSM303D Datasheet, PDF (23/52 Pages) STMicroelectronics – Embedded temperature sensor

LSM303D
Digital interfaces
Table 13. Transfer when master is writing multiple bytes to slave
Master ST SAD + W
SUB
DATA
DATA
SP
Slave
SAK
SAK
SAK
SAK
Table 14. Transfer when master is receiving (reading) one byte of data from slave
Master ST SAD + W
SUB
SR SAD + R
NMAK SP
Slave
SAK
SAK
SAK DATA
Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave
Master ST SAD+W
SUB
SR SAD+R
MAK
MAK
NMAK SP
Slave
SAK
SAK
SAK DATA
DATA
DATA
Data is transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of
bytes sent per transfer is unlimited. Data is transferred with the most significant bit (MSb)
first. If a receiver cannot receive another complete byte of data until it has performed some
other function, it can hold the clock line, SCL, low to force the transmitter into a wait state.
Data transfer only continues when the receiver is ready for another byte and releases the
data line. If a slave receiver does not acknowledge the slave address (i.e. it is not able to
receive because it is performing some real-time function) the data line must be left high by
the slave. The master can then abort the transfer. A low-to-high transition on the SDA line
while the SCL line is high is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-
address field. In other words, SUB(7) must be equal to ‘1’ while SUB(6-0) represents the
address of the first register to be read.
In the communication format presented, MAK is master acknowledge and NMAK is no
master acknowledge.
6.2
SPI bus interface
The SPI is a bus slave. The SPI allows writing and reading the registers of the device.
The serial interface interacts with the outside world through 4 wires: CS, SPC, SDI and
SDO.
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