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M39432 Datasheet, PDF (4/28 Pages) STMicroelectronics – Single Chip 4 Mbit Flash Memory and 256 Kbit Parallel EEPROM
M39432
Table 3. Operations
Operation
EF
EE
G
W
DQ0 - DQ7
Read
VIL
VIH
Read from Flash Block
VIL
VIH
VIH
VIL
Read from EEPROM Block
Write
VIL
VIH
Write to Flash Block
VIH
VIL
VIH
VIL
Write to EEPROM Block
VIL
VIH
Output Disable
VIH
X
VIH
VIL
Hi-Z
Stand-by
VIH
VIH
X
X
Note: 1. X = VIH or VIL.
Hi-Z
This open drain output can be wire-ORed, using
an external pull-up resistor, when several M39xxx
devices are used together.
VCC Supply Voltage
The VCC Supply Voltage supplies the power for
the device. The M39432 cannot be written when
the VCC Supply Voltage is less than the Lockout
Voltage, VLKO. This prevents Bus Write operations
from accidentally damaging the data during power
up, power down and during power surges.
A 100 nF capacitor should be connected between
the VCC Supply Voltage pin and the VSS Ground
pin, to decouple the current surges from the power
supply. The PCB track widths must be sufficient to
carry the currents required during program and
erase operations.
VSS Ground
The VSS Ground is the reference for all voltage
measurements.
DEVICE OPERATION
The M39432 memory device is addressed via 19
inputs (A0-A18) and carries data on 8 Data Inputs/
Outputs (DQ0-DQ7). There are four other control
inputs: Chip Enable EEPROM (EE), Chip Enable
Flash Memory (EF), Output Enable (E) and Write
Enable (W).
The Chip Enable inputs (EF or EE) are used
mainly for power control (turning the chip on and
off) and for block selection (selecting the
EEPROM block or the Flash memory block). The
gating of data to the DQ0-DQ7 pins should be
controlled using the Output Enable input (G).
The permitted operating modes of the device are
listed in Table 3.
Read
For a Read operation, the Output Enable (G) and
one Chip Enable (EF or EE) must be driven low.
As noted on the previous page, Read operations
are used to read the contents of:
– bytes in the Flash memory block
– bytes in the EEPROM block
– the Manufacturer Identifier
– the Flash Sector Protection Status
– the Flash Block Identifier
– the EEPROM Identifier
– the OTP row.
The instruction sequences for selecting between
these areas is summarized in Table 4.
Write
Writing data requires:
– a Chip Enable (either EE or EF) to be low
– the Write Enable (W) to be low and the Output
Enable (G) to be high.
Addresses in the Flash memory block (or the
EEPROM block) are latched on the falling edge of
W or EF (or EE) whichever occurs the later. The
data to be written to the Flash memory block (or
EEPROM block) is latched on the rising edge of W
or EF (or EE) whichever occurs first.
The Write operation is used in two contexts:
– to write data to the EEPROM memory block
– to enter the sequence of bytes that makes up
one of the instructions shown in Table 4.
The programming of a byte of Flash memory
involves one of these instructions (as described in
the section entitled “Instructions” on this page).
Specific Read and Write Operations
Device specific information includes the following:
– Read the Manufacturer Identifier
– Read the Device Identifier
– Define the Flash Sector Protection
– Read the EEPROM Identifier
– Write the EEPROM Identifier
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