AN910 Datasheet, PDF (39/51 Pages) STMicroelectronics – ST7 AND ST9 PERFORMANCE BENCHMARKING

ST7 AND ST9 PERFORMANCE BENCHMARKING
7.3.12 78K0 MCU core
Programming model
Register file &
Accumulator
- general registers
4 banks of eight 8-bit registers
useable as four 16-bit registers
second register is the accumulator
they are memory mapped
- cpu special function registers
16-bit program counter
16-bit stack pointer
program status word
- multitasking capabilities
context switching with banked registers
MOV A,(R1)
ADD A,#A0
Instruction set
Cisc encoding
- CPI
4 cycles to 50 cycles
- average CPI
between 14 and 16 cycles
- IL
1 byte to 4 bytes
- average IL
between 2 and 3 bytes
- special addressing modes
register indirect
indexed with 8-bit offset
stack pointer relative
- special instructions
decrement & branch like
78K0 CPU
Core internal buses
16-bit address bus, 8-bit data bus
(to be confirmed)
Instruction processing
Standard
- sequential processing
Arithmetic Logic Unit
+/x
8-bit datapath
- 8-bit operations
- special functions
8x8 unsigned multiplication
16/8 unsigned division
32 cycles
50 cycles
On-chip/Off-chip buses
- on-chip buses
8/16-bit address bus
8-bit data memory bus
8-bit program memory bus
- off-chip buses
8/16-bit address bus
8-bit data/program memory bus
the two buses are multiplexed
the two buses are multiplexed with ports
Memory Space
Von Neumann organization
- linear data/program memory space
64 kbytes
upper 256-byte special function register space
peripheral registers
sfr addressing
following 32-byte general register space
register addressing
256-byte zero page straddle sfr/register/ram spaces
first 64-byte interrupt vector table = 14 interrupts
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