AN910 Datasheet, PDF (31/51 Pages) STMicroelectronics – ST7 AND ST9 PERFORMANCE BENCHMARKING

ST7 AND ST9 PERFORMANCE BENCHMARKING
7.3.4 ST9+ MCU core
Programming model
Register file
- general purpose registers
14 groups of sixteen 8-bit registers
- system registers
one group of sixteen 8-bit registers
flags, central interrupt control register
user/system stack pointers
mode register, page pointer
2 register group pointers
i/o port data registers
- paged registers
on-chip peripheral data and control registers
up to 64 pages of sixteen 8-bit registers
- 16-bit program counter
- multitasking capabilities
context switching with register group pointers
LDW RRd,rrs
ADD Rd,#2
Instruction set
Cisc encoding
- CPI
2 cycles to 26 cycles
- average CPI
between 10 and 12 cycles
- IL
1 byte to 6 bytes
- average IL
between 3 and 4 bytes
- special addressing modes
bit access to whole register file
register pair (two 8-bit registers as one 16-bit)
register direct/indirect
indirect with pre/post-increment
indexed (short, long, register, memory)
- special instructions
exchange register contents
bit test & set
decrement & branch like
memory-to-memory moves
register indirect to reg. ind., both post-increment
ST9+ CPU
Cpu internal buses
16-bit address
8-bit data multiplexed bus
Instruction processing
Prefetch mechanism
- next byte prefetching
as soon as instruction register is available
and address is known
Arithmetic Logic Unit
+/x
8-bit datapath
- 8/16-bit operations
- special functions
8x8 unsigned multiplication
22 cycles
16/8 unsigned divisions
26/14 cycles
32/16 stepped unsigned divisions 26 cycles
On-chip/Off-chip buses
- on-chip buses
16-bit address bus
8/16-bit data/program memory bus
8-bit register bus
- off-chip buses
8/16-bit address bus
up to 22-bit with memory management unit
8-bit multiplexed data/program memory bus
the two buses may be multiplexed
the two buses are multiplexed with ports
Memory Spaces
Harvard organization
- register file space
224 bytes of general purpose registers
system, on-chip peripheral, and i/o port registers
- linear data/program memory space
data memory space
up to 256 segments of 16 kbytes each = 4 Mbytes
program memory space
up to 64 segments of 64 kbytes each = 4 Mbytes
256-byte interrupt vector table = 128 interrupts
user-programmable location
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