SERCON410B Datasheet, PDF (26/34 Pages) STMicroelectronics – SERCOS INTERFACE CONTROLLER

SERCON410B
CONTROL REGISTER ADDRESSES (Continued)
A6-1
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
Bit
0-15
0-15
0-15
0-15
0-7
Name
TINT2
TINT3
TDIVCLK
DTDIVCLK
NDIVCLK
8
POLDIVCLK
9-15
0-9
THTPT
10-15
0-15 THT
0-9
THWPT
10-15
0-15 THW
0-9
THRPT
10
MSTTCHK
25H
11
PHAS12
12
FLMDTADR
13-15
26H
0-15 THR
0-15 RFIFO
27H
0-15 TFIFO
R/W
Value
Function
R/W
Time at which time interrupt 2 occurs
R/W
Time at which time interrupt 3 occurs
R/W
Time at which the first pulse of DIV_CLK
occurs
R/W
DIV_CLK pulse distance
R/W
Number of DIV_CLK pulses within one
communication cycle (reset value =0)
R/W
0
Pulses from DIV_CLK are 1-active
1
Pulses from DIV_CLK are 0-active
(Not used)
R
Internal RAM address of telegram header of
transmitted telegram
(Not used)
R
Control word 0 of telegram header of
transmitted telegram
R
Internal RAM address of telegram header of
a telegram which is expected
(Not used)
R
Control word 0 of telegram header of
telegram which is expected
R
Internal RAM address of telegram header of
received telegram
R/W
0
MST receive time is not checked
1
MST receive time is checked
0
Normal operation
R/W
1
Operating mode for SERCOS interface
phase 1 and 2
0
Address of receive telegram different
R/W
from expected value
1
Address of receive telegram equal to
expected value
(Not used)
R
Control word 0 of telegram header of
received telegram
R
Receive FIFO
W
Transmit FIFO
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