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W305B Datasheet, PDF (5/20 Pages) Cypress Semiconductor – Frequency Controller with System Recovery for Intel Integrated Core Logic
W305B
0 ns
10 ns
20 ns
30 ns
40 ns
CPU 133-MHz
Cycle Repeat
SDRAM 133MHz
3V66 66-MHz
PCI 33-MHz
APIC 16.6-MHz
REF 14.318-MHz
USB 48-MHz
DOT 48-MHz
Figure 5. Group Offset Waveform (133-MHz CPU/133-MHz SDRAM)
Serial Data Interface
The W305B features a two-pin, serial data interface that can
be used to configure internal register settings that control
particular device functions.
Data Protocol
The clock driver serial protocol supports byte/word write,
byte/word read, block write and block read operations from the
controller. For block write/read operation, the bytes must be
accessed in sequential order from lowest to highest byte with
the ability to stop after any complete byte has been trans-
ferred. For byte/word write and byte read operations, system
controller can access individual indexed byte. The offset of the
indexed byte is encoded in the command code.
The definition for the command code is given in Table 1.
Table 1. Command Code Definition
Bit
Descriptions
7
0 = Block read or block write operation
1 = Byte/Word read or byte/word write operation
6:0
Byte offset for byte/word read or write operation. For block read or write operations, these bits
need to be set at ‘0000000’.
Table 2. Block Read and Block Write Protocol
Block Write Protocol
Bit
Description
1
Start
2:8
9
10
11:18
19
20:27
Slave address – 7 bit
Write
Acknowledge from slave
Command Code – 8 bit
‘00000000’ stands for block operation
Acknowledge from slave
Byte Count – 8 bits
28
29:36
37
38:45
46
...
Acknowledge from slave
Data byte 0 – 8 bits
Acknowledge from slave
Data byte 1 – 8 bits
Acknowledge from slave
Data Byte N/Slave Acknowledge...
Bit
1
2:8
9
10
11:18
19
20
21:27
28
29
30:37
38
39:46
Block Read Protocol
Description
Start
Slave address – 7 bit
Write
Acknowledge from slave
Command Code – 8 bit
‘00000000’ stands for block operation
Acknowledge from slave
Repeat start
Slave address – 7 bits
Read
Acknowledge from slave
Byte count from slave – 8 bits
Acknowledge
Data byte from slave – 8 bits
Rev 1.0, November 20, 2006
Page 5 of 20