LAN9221 Datasheet, PDF (93/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
5.3.11 RX_FIFO_INF—Receive FIFO Information Register
Offset:
7Ch
Size:
32 bits
This register contains the used space in the receive FIFOs of the LAN9221/LAN9221i Ethernet
Controller.
BITS
DESCRIPTION
31-24 Reserved
23-16
15-0
RX Status FIFO Used Space (RXSUSED). Indicates the amount of space
in DWORDs, used in the RX Status FIFO.
RX Data FIFO Used Space (RXDUSED).). Reads the amount of space in
bytes, used in the RX data FIFO. For each receive frame, this field is
incremented by the length of the receive data rounded up to the nearest
DWORD (if the payload does not end on a DWORD boundary).
TYPE
RO
RO
RO
DEFAULT
-
00h
0000h
5.3.12 TX_FIFO_INF—Transmit FIFO Information Register
Offset:
80h
Size:
32 bits
This register contains the free space in the transmit data FIFO and the used space in the transmit
status FIFO in the LAN9221/LAN9221i.
BITS
DESCRIPTION
31-24 Reserved
23-16
15-0
TX Status FIFO Used Space (TXSUSED). Indicates the amount of space
in DWORDS used in the TX Status FIFO.
TX Data FIFO Free Space (TDFREE). Reads the amount of space in bytes,
available in the TX data FIFO. The application should never write more data
than is available, as indicated by this value.
TYPE
RO
RO
RO
DEFAULT
-
00h
1200h
SMSC LAN9221/LAN9221i
93
DATASHEET
Revision 2.6 (12-04-08)