LAN9221 Datasheet, PDF (150/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
Chapter 9 Revision History
Table 9.1 Customer Revision History
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY
CORRECTION
Rev. 2.5
(11-13-08)
Rev. 2.4
(10-24-08)
Rev. 2.3
(08-18-08)
Rev. 2.2
(06-19-08)
All
Fixed various typos
All
Fixed various typos
Table 7.1 on page 140 and Added power consumption values.
Table 7.2 on page 141
Section 7.5, "Worst Case
Current Consumption," on
page 142
Updated with current consumption values for
various VDDVARIO values.
Section 7.6, "DC Electrical Added input capacitance and input leakage values.
Specifications," on page 143
Section 3.8, "General
Purpose Timer (GP Timer),"
on page 38
Changed incorrect “GPT_CNT” reference to
“GPT_LOAD”: “On a reset, or when the
TIMER_EN bit changes from set ‘1’ to cleared ‘0,’
the GPT_LOAD field is initialized to FFFFh.”
Section 5.3.23, "E2P_CMD
– EEPROM Command
Register," on page 103
Corrected MAC Address Loaded (bit 8) type from
“RO” to “R/WC”
Table 7.11 on page 147
Updated crystal specifications:
Drive Level: 300uW
ESR: 50 Ohms.
Note 7.9 on page 145
Note following I/O Buffer Characteristics table
modified:
Changed from: ".....the per-pin input leakage is 10
divided by the maximum input leakage current."
to: ".....the per-pin input leakage is the maximum
input leakage current divided by 10."
Figure 1.2, "Internal Block
Diagram"
Diagram redone.
The word “Core” was added to the regulator block
title.
Table 2.4, “System and
Changed VDD_CORE/VDD18CORE bulk
Power Signals,” on page 18 capacitor value from 10uF to 4.7uF.
Revision 2.6 (12-04-08)
150
DATASHEET
SMSC LAN9221/LAN9221i