LAN9221 Datasheet, PDF (10/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
Chapter 1 General Description
The LAN9221/LAN9221i is a full-featured, single-chip 10/100 Ethernet controller designed for
embedded applications where performance, flexibility, ease of integration and system cost control are
required. The LAN9221/LAN9221i has been specifically designed to provide high performance and
throughput for 16-bit applications. The LAN9221/LAN9221i is fully IEEE 802.3 10BASE-T and 802.3u
100BASE-TX compliant, and supports HP Auto-MDIX. The variable voltage I/O signals of the
LAN9221/LAN9221i accommodate lower voltage I/O signalling without the need for voltage level
shifters.
The LAN9221/LAN9221i includes an integrated Ethernet MAC and PHY with a high-performance
SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less
connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit
microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the
automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading
the task from the CPU. The LAN9221/LAN9221i also includes large transmit and receive data FIFOs
to accommodate high latency applications. In addition, the LAN9221/LAN9221i memory buffer
architecture allows highly efficient use of memory resources by optimizing packet granularity.
Applications
The LAN9221/LAN9221i is well suited for many high-performance embedded applications, including:
„ Cable, satellite and IP set-top boxes
„ High-end audio distribution systems
„ Digital video recorders
„ DVD Recorders/Players
„ Digital TV
„ Digital media clients/servers
„ Home gateways
„ Industrial and embedded systems with extended temperature support
The LAN9221/LAN9221i also supports features which reduce or eliminate packet loss. Its internal 16-
KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the
LAN9221/LAN9221i can automatically generate flow control packets to the remote node, or assert
back-pressure on the remote node by generating network collisions.
The LAN9221/LAN9221i supports numerous power management and wakeup features. The
LAN9221/LAN9221i can be placed in a reduced power mode and can be programmed to issue an
external wake signal via several methods, including “Magic Packet”, “Wake on LAN” and “Link Status
Change”. This signal is ideal for triggering system power-up using remote Ethernet wakeup events.
The device can be removed from the low power state via a host processor command.
Revision 2.6 (12-04-08)
10
DATASHEET
SMSC LAN9221/LAN9221i