LAN9221 Datasheet, PDF (33/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
3.6.1.1
RX Checksum Calculation
The checksum is calculated 16 bits at a time. In the case of an odd sized frame, an extra byte of zero
is used to pad up to 16 bits.
Consider the following packet: DA, SA, Type, B0, B1, B2 … BN, FCS
Let [A, B] = A*256 + B;
If the packet has an even number of octets then
checksum = [B1, B0] + C0 + [B3, B2] + C1 + … + [BN, BN-1] + CN-1
Where C0, C1, ... CN-1 are the carry out results of the intermediate sums.
If the packet has an odd number of octets then
checksum = [B1, B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1
3.6.2 Transmit Checksum Offload Engine (TXCOE)
The transmit checksum offload engine provides assistance to the CPU by calculating a 16-bit
checksum, typically for TCP, for a transmit Ethernet frame. The TXCOE calculates the checksum and
inserts the results back into the data stream as it is transferred to the MAC.
To activate the TXCOE and perform a checksum calculation, the host must first set the TX checksum
offload engine enable bit (TXCOE_EN) in the COE_CR—Checksum Offload Engine Control Register.
The host then pre-pends a 3 DWORD buffer to the data that will be transmitted. The pre-pended buffer
includes a TX Command ‘A’, TX Command ‘B’, and a 32-bit TX checksum preamble. When bit 14 (CK)
of the TX Command ‘B’ is set in conjunction with bit 13 (FS) of TX Command ‘A’ and bit 16
(TXCOE_EN) of the COE_CR register, the TXCOE will perform a checksum calculation on the
associated packet. When these three bits are set, a 32-bit TX checksum preamble must be pre-pended
to the beginning of the TX packet (refer to Table 3.7). The TX checksum preamble instructs the TXCOE
on the handling of the associated packet. Bits 11:0 of the TX checksum preamble define the byte offset
at which the data checksum calculation will begin (TXCSSP). The checksum calculation will begin at
this offset and will continue until the end of the packet. The data checksum calculation must not begin
in the MAC header (first 14 bytes) or in the last 4 bytes of the TX packet. When the calculation is
complete, the checksum will be inserted into the packet at the byte offset defined by bits 27:16 of the
TX checksum preamble (TXCSLOC). The TX checksum cannot be inserted in the MAC header (first
14 bytes) or in the last 4 bytes of the TX packet. If the CK bit is not set in the first TX Command ‘B’
of a packet, the packet is passed directly through the TXCOE without modification, regardless if the
TXCOE_EN is set. An example of a TX packet with a pre-pended TX checksum preamble can be
found in Section 3.12.6.3, "TX Example 3". In this example the host writes the packet data to the
ethernet controller in four fragments, the first containing the TX Checksum Preamble. Figure 3.17
shows how these fragments are loaded into the TX Data FIFO. For more information on the TX
Command ‘A’ and TX Command ‘B’, refer to Section 3.12.2, "TX Command Format".
If the TX packet already includes a partial checksum calculation (perhaps inserted by an upper layer
protocol), this checksum can be included in the hardware checksum calculation by setting the TXCSSP
field in the TX checksum preamble to include the partial checksum. The partial checksum can be
replaced by the completed checksum calculation by setting the TXCSLOC pointer to point to the
location of the partial checksum.
SMSC LAN9221/LAN9221i
33
DATASHEET
Revision 2.6 (12-04-08)