LAN9221 Datasheet, PDF (90/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
BITS
DESCRIPTION
0 Soft Reset (SRST). Writing 1 generates a software initiated reset. This reset
generates a full reset of the MAC CSR’s. The SCSR’s (system command
and status registers) are reset except for any NASR bits. Soft reset also
clears any TX or RX errors (TXE/RXE). This bit is self-clearing.
Notes:
„ Do not attempt a soft reset unless the PHY is fully awake and operational.
After a PHY reset, or when returning from a reduced power state, the PHY
must given adequate time to return to the operational state before a soft
reset can be issued.
„ The LAN9221/LAN9221i must always be read at least once after power-
up, reset, or upon return from a power-saving state or write operations will
not function.
TYPE
SC
DEFAULT
0
Revision 2.6 (12-04-08)
90
DATASHEET
SMSC LAN9221/LAN9221i