COM20022I Datasheet, PDF (73/83 Pages) SMSC Corporation – 10 MBPS ARCNET CONTROLLER WITH 2KX8 ON BOARD RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM
Datasheet
nTXEN
t1
nPULSE1
nPULSE2
(Internal Clk)
t9
t4
t3
t2
t5
t6
t7
RXIN
t10
t12
t11
Parameter
t1 nPULSE2 High to nTXEN Low
t2 _{nPULSE1 Pulse Width}
t3 _{nPULSE1 Period}
t4 _{nPULSE2 Low to nPULSE1 Low}
t5 _{nPULSE2 High Time}
t6 _{nPULSE2 Low Time}
t7 _{nPULSE2 Period}
t8 nPULSE2 High to nTXEN High
(First Rising Edge on nPULSE2 after Last Bit Time)
t9 nTXEN Low to first nPULSE1 Low**
t13 Beginning Last Bit Time to nTXEN High**
t10 _{RXIN Active Pulse Width}
t11 _{RXIN Period}
t12 _{RXIN Inactive Pulse Width}
Above values are for 2.5 Mbps.
Other Data Rates are shown below.
TDR is the Data Rate Period
*t5, t6 = TDR/4
*t2, t7, t10 = TDR/2
*t3, t11 = TDR
**t9
=
7
4
x
TDR
+/-
50
nS
**t13
=
5
4
x
TDR
+/-
50
nS
t13
t8
LAST BIT
(400 nS BIT TIME)
min typ max units
-25
50 nS
200*
nS
400*
nS
-25
50 nS
100*
nS
100*
nS
200*
nS
-25
50 _nS
650
750 nS
450
550 nS
10 200*
nS
400*
nS
20
nS
Figure 8.14 - Backplane Mode Transmit or Receive Timing
(These signals are to and from the differential driver or the cable)
SMSC COM20022I
Page 73
DATASHEET
Rev. 08-18-03