LAN91C100FD_0601 Datasheet, PDF (57/78 Pages) SMSC Corporation – FEAST Fast Ethernet Controller with Full Duplex Capability

FEAST Fast Ethernet Controller with Full Duplex Capability
VL BUS
SIGNAL
nBE0 nBE1
nBE2 nBE3
nADS
IRQn
D0-D31
LAN91C100
SIGNAL
nBE0 nBE1
nBE2 nBE3
nADS, nCYCLE
INTR0-INTR3
D0-D31
NOTES
Byte enables. Latched transparently by nADS rising edge.
Address Strobe is connected directly to the VL bus. nCYCLE is
created typically by using nADS delayed by one LCLK.
Typically uses the interrupt lines on the ISA edge connector of
VL bus
32 bit data bus. The bus byte(s) used to access the device are a
function of nBE0-nBE3:
nBE0
0
0
1
0
1
1
1
nBE1
0
0
1
1
0
1
1
nBE2
0
1
0
1
1
0
1
nBE3
0
1
0
1
1
1
0
Double word access
Low word access
High word access
Byte 0 access
Byte 1 access
Byte 2 access
Byte 3 access
nLDEV
VCC
GND
OPEN
nLDEV
nRD nWR
A1 nVLBUS
nDATACS
Not used = tri-state on reads, ignored on writes. Note that nBE2
and nBE3 override the value of A1, which is tied low in this
application.
nLDEV is a totem pole output. nLDEV is active on valid decodes
of A15-A4 and AEN=0.
UNUSED PINS
SMSC DS – LAN91C100FD Rev. D
Page 57
DATASHEET
Rev. 01-20-06