LAN9215_12 Datasheet, PDF (143/144 Pages) SMSC Corporation – 16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX Support

16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX Support
Datasheet
Chapter 9 Datasheet Revision History
Table 9.1 Customer Revision History
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY
CORRECTION
Rev. 2.9
(03-01-12)
Rev. 2.8
(07-14-11)
Rev. 2.7
(03-15-10)
Rev. 2.5
(11-13-08)
Rev. 2.4
(10-24-08)
Rev. 2.3
(07-30-08)
Rev. 2.3
(08-18-08)
Section 5.4.8,
"FLOW—Flow Control
Register," on page 109
Updated Pass Control Frames (bit 2) description to
“When set, the MAC will pass the pause frame to
the host...”
Table 2.5, “System and
Power Signals,” on page 19
nLED1 description modified to indicate that the
signal is driven low when operating speed is
100Mbs and is driven high during autonegotiation,
when the cable is disconnected, and during 10
Mbs operation.
Section 5.2.1, "RX FIFO
Ports," on page 74
RX Data FIFO port is aliased to 16 WORD
locations, not 16 DWORD locations.
Section 5.2.2, "TX FIFO
Ports," on page 74
TX Data FIFO port is aliased to 16 WORD
locations, not 16 DWORD locations.
Chapter 2, "Pin Description
and Configuration," on
page 15
Added pin 1 designator to pin diagram
Section 7.2, "Operating
Added note: “Do not drive input signals without
Conditions**," on page 133 power supplied to the device.”
Section 7.2, "Operating
Conditions**," on page 133
Added note: “Apply and remove power to all power
supply pins simultaneously, including the Ethernet
magnetics. Do not apply power to individual supply
pins without the others.”
Section 7.6, "DC Electrical Added max input capacitance numbers
Specifications," on page 137
All
Fixed various typos
Section 3.7, "General
Purpose Timer (GP Timer),"
on page 34
Section 5.3.23, "E2P_CMD
– EEPROM Command
Register," on page 98
Table 7.7 on page 139
Block Diagram
Note 7.6 on page 138
Changed incorrect “GPT_CNT” reference to
“GPT_LOAD”: “On a reset, or when the
TIMER_EN bit changes from set ‘1’ to cleared ‘0,’
the GPT_LOAD field is initialized to FFFFh.”
Corrected MAC Address Loaded (bit 8) type from
“RO” to “R/WC”
Updated crystal specifications:
Drive Level: 300uW
ESR: 50 Ohms.
Figure modified removing “system memory” and
double-sided arrow on top of the “processor” block.
Note following I/O Buffer Characteristics table
modified:
Changed from: ".....the per-pin input leakage is 10
divided by the maximum input leakage current."
to: ".....the per-pin input leakage is the maximum
input leakage current divided by 10."
SMSC LAN9215
143
DATASHEET
Revision 2.9 (03-01-12)