EFM8UB2 Datasheet, PDF (8/50 Pages) Silicon Laboratories – The EFM8UB2 highlighted features are listed below

EFM8UB2 Data Sheet
System Overview
System Management Bus / I2C (SMB0 and SMB1)
The SMBus I/O interface is a two-wire, bi-directional serial bus. The SMBus is compliant with the System Management Bus Specifica-
tion, version 1.1, and compatible with the I²C serial bus.
The SMBus modules include the following features:
• Standard (up to 100 kbps) and Fast (400 kbps) transfer speeds.
• Support for master, slave, and multi-master modes.
• Hardware synchronization and arbitration for multi-master mode.
• Clock low extending (clock stretching) to interface with faster masters.
• Hardware support for 7-bit slave and general call address recognition.
• Firmware support for 10-bit slave address decoding.
• Ability to inhibit all slave states.
• Programmable data setup/hold times.
External Memory Interface (EMIF0)
The External Memory Interface (EMIF) enables access of off-chip memories and memory-mapped devices connected to the GPIO
ports. The external memory space may be accessed using the external move instruction (MOVX) with the target address specified in
either 8-bit or 16-bit formats.
• Supports multiplexed and non-multiplexed memory access.
• Four external memory modes:
• Internal only.
• Split mode without bank select.
• Split mode with bank select.
• External only
• Configurable ALE (address latch enable) timing.
• Configurable address setup and hold times.
• Configurable write and read pulse widths.
3.7 Analog
10-Bit Analog-to-Digital Converter (ADC0)
The ADC is a successive-approximation-register (SAR) ADC with 10-bit mode, integrated track-and hold and a programmable window
detector. The ADC is fully configurable under software control via several registers. The ADC may be configured to measure different
signals using the analog multiplexer. The voltage reference for the ADC is selectable between internal and external reference sources.
The ADC module is a Successive Approximation Register (SAR) Analog to Digital Converter (ADC). The key features of this ADC mod-
ule are:
• Up to 32 external inputs.
• Differential or Single-ended 10-bit operation.
• Supports an output update rate of 500 ksps samples per second.
• Asynchronous hardware conversion trigger, selectable between software, external I/O and internal timer sources.
• Output data window comparator allows automatic range checking.
• Two tracking mode options with programmable tracking time.
• Conversion complete and window compare interrupts supported.
• Flexible output data formatting.
• Voltage reference selectable from external reference pin, on-chip precision reference (driven externally on reference pin), or VDD
supply.
• Integrated temperature sensor.
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