EFM8UB2 Datasheet, PDF (13/50 Pages) Silicon Laboratories – The EFM8UB2 highlighted features are listed below

Parameter
Symbol Test Condition
Voltage Reference Range
Input Voltage Range¹
V_REF
V_IN
Single-Ended (AIN+ - GND)
Differential (AIN+ - AIN-)
Power Supply Rejection Ratio
DC Performance, VREF = 2.4 V
PSRR_ADC
Integral Nonlinearity
INL
Differential Nonlinearity (Guaran- DNL
teed Monotonic)
Offset Error
E_OFF
Offset Temperature Coefficient
TC_OFF
Slope Error
E_M
Dynamic Performance 10 kHz Sine Wave Input 1dB below full scale, VREF = 2.4 V
Signal-to-Noise
SNR
Signal-to-Noise Plus Distortion
SNDR
Total Harmonic Distortion (Up to
5th Harmonic)
THD
Spurious-Free Dynamic Range
SFDR
Note:
1. Absolute input pin voltage is limited by the VDD and GND supply pins.
Min
1
0
-V_REF
—
—
—
-2
—
—
55
55
—
—
EFM8UB2 Data Sheet
Electrical Specifications
Typ
Max
Unit
—
V_DD
V
—
V_REF
V
—
V_REF
V
70
—
dB
±0.5
±0.5
0
0.005
-0.2
±1
LSB
±1
LSB
2
LSB
—
LSB/°C
±0.5
%
58
—
dB
58
—
dB
-73
—
dB
78
—
dB
Table 4.9. Voltage Reference
Parameter
Symbol Test Condition
Min
On-chip Precision Reference
Output Voltage
V_REFP
T = 25 °C
2.38
Turn-on Time, settling to 0.5 LSB t_VREFP
4.7 µF tantalum + 0.1 µF ceramic
—
bypass on VREF pin
0.1 µF ceramic bypass on VREF
—
pin
Load Regulation
LR_VREFP Load = 0 to 200 µA to GND
—
Short-circuit current
ISC_VREFP
—
Power Supply Rejection
PSRR_VRE
—
FP
External Reference
Input Current
I_EXTREF Sample Rate = 500 ksps; VREF =
—
3.0 V
Typ
2.42
3
100
360
—
140
9
Max
Unit
2.46
V
—
ms
—
µs
—
µV / µA
8
mA
—
ppm/V
—
μA
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