EFM8UB2 Datasheet, PDF (19/50 Pages) Silicon Laboratories – The EFM8UB2 highlighted features are listed below

5. Typical Connection Diagrams
EFM8UB2 Data Sheet
Typical Connection Diagrams
5.1 Power
Figure 5.1 Connection Diagram with Voltage Regulator Used and USB Connected (Bus-Powered) on page 18 shows a typical con-
nection diagram for the power pins of the EFM8UB2 devices when the internal regulator used and USB is connected (bus-powered).
The VBUS signal is used to detect when USB is connected to a host device.
USB 5 V (in)
1 µF and 0.1 µF bypass
capacitors required for
each power pin placed
as close to the pins as
possible.
EFM8UB2 Device
3.3 V (out)
VBUS
VREGIN
VDD
Voltage
Regulator
GND
Figure 5.1. Connection Diagram with Voltage Regulator Used and USB Connected (Bus-Powered)
Figure 5.2 Connection Diagram with Voltage Regulator Used and USB Connected (Self-Powered) on page 19 shows a typical con-
nection diagram for the power pins of the EFM8UB2 devices when the internal regulator used and USB is connected (self-powered).
The VBUS signal is used to detect when USB is connected to a host device and is shown with a resistor divider. This resistor divider (or
functionally-equivalent circuit) on VBUS is required to meet the absolute maximum voltage on VBUS specification for self-powered sys-
tems where VDD and VIO may be unpowered when VBUS is connected to 5 V.
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