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SI598 Datasheet, PDF (7/28 Pages) Silicon Laboratories – Programmable with 28 parts per trillion frequency resolution
Si598/Si599
Table 4. CLK± Output Levels and Symmetry
(Typical values TA = 25 ºC, VDD = 3.3 V, min/max limits VDD = 1.8 ±5%, 2.5 or 3.3 V ±10%, TA = –40 to 85 ºC unless otherwise
noted)
Parameter
Symbol
Test Condition
Min
Typ
Max Units
VO
LVPECL Output Option1
VOD
VSE
VO
LVDS Output Option2
VOD
mid-level
swing (diff)
swing (single-ended)
mid-level
swing (diff)
VDD – 1.42
1.1
0.55
1.125
0.5
—
—
—
1.20
0.7
VDD – 1.25 V
1.9
VPP
0.95
VPP
1.275
V
0.9
VPP
CML Output Option2
2.5/3.3 V option mid-level
VO
1.8 V option mid-level
—
VDD – 1.30
—
—
VDD – 0.36
—
V
V
2.5/3.3 V option swing (diff) 1.10
VOD
1.8 V option swing (diff)
0.35
1.50
0.425
1.90
VPP
0.50
VPP
CMOS Output Option3
VOH
VOL
IOH = 32 mA
IOL = 32 mA
0.8 x VDD
—
—
—
VDD
V
0.4
V
LVPECL/LVDS/CML
—
Rise/Fall Time (20/80 %)
tR, tF
CMOS with CL = 15 pF
—
—
350
ps
1
—
ns
LVPECL: VDD – 1.3 V (diff)
Symmetry (duty cycle)
SYM LVDS: 1.25 V (diff)
48
—
52
%
CMOS: VDD/2
Notes:
1. 50  to VDD – 2.0 V.
2. Rterm = 100  (differential).
3. CL = 15 pF sinking or sourcing 12 mA for VDD = 3.3 V, 6 mA for VDD = 2.5 V, 3 mA for VDD = 1.8 V.
Rev. 1.0
7