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SI598 Datasheet, PDF (12/28 Pages) Silicon Laboratories – Programmable with 28 parts per trillion frequency resolution
Si598/Si599
3. Functional Description
The Si598 XO and the Si599 VCXO are low-jitter
oscillators ideally suited for applications requiring
programmable frequencies. The Si59x can be
programmed to generate any output clock in the range
of 10 to 810 MHz with frequency resolution of 30 parts
per trillion. Output jitter performance exceeds the strict
requirements of high-speed communication systems
including OC-48/STM-16, 3G SDI, and Gigabit
Ethernet.
The Si59x consists of a digitally-controlled oscillator
(DCO) based on Silicon Laboratories' third-generation
DSPLL technology, which is driven by an internal fixed-
frequency crystal reference.
The device's default output frequency is set at the
factory and can be reprogrammed through the two-wire
I2C serial port. Once the device is powered down, it will
return to its factory-set default output frequency.
The Si599 has a pullable output frequency using the
voltage control input pin. This makes the Si599 an ideal
choice for high-performance, low-jitter, phase-locked
loops. The Si598 is digitally pullable using the I2C
interface and is ideal for digital PLL applications.
3.1. Programming a New Output Frequency
The output frequency (fout) is determined by
programming the DCO frequency (fDCO) and the
device's output dividers (HS_DIV, N1). The output
frequency is calculated using the following equation:
fout = O-----u----t-p----u-f--Dt---DC----O-i-v---i-d----e---r--s- = f--X---H-T---A-S---L-D-----I--VR-----F----R-N----E-1---Q---
The DCO frequency is adjustable in the range of 4.85 to
5.67 GHz by setting the high-resolution 38-bit fractional
multiplier (RFREQ). The DCO frequency is the product
of the internal fixed-frequency crystal (fXTAL) and
RFREQ.
The 38-bit resolution of RFREQ allows the DCO
frequency to have a programmable frequency resolution
of 28 ppt.
As shown in Figure 3, the device allows reprogramming
of the DCO frequency up to ±3500 ppm from the center
frequency configuration without interruption to the
output clock. Changes greater than the ±3500 ppm
window will cause the device to recalibrate its internal
tuning circuitry, forcing the output clock to momentarily
stop and start at any arbitrary point during a clock cycle.
This re-calibration process establishes a new center
frequency and can take up to 10 ms. Circuitry receiving
a clock from the Si59x device that is sensitive to glitches
or runt pulses may have to be reset once the
recalibration process is complete.
3.1.1. Reconfiguring the Output Clock for a Small
Change in Frequency
For output changes less than ±3500 ppm from the
center frequency configuration, the DCO frequency is
the only value that needs reprogramming. Since
fDCO = fXTAL x RFREQ, and that fXTAL is fixed, changing
the DCO frequency is as simple as reconfiguring the
RFREQ value as outlined below:
1. Using the serial port, read the current RFREQ value
(registers 0x08–0x12).
2. Calculate the new value of RFREQ given the change
in frequency.
RFREQnew = RFREQcurrent  f--o-f--uo---tu-_--tc-_--un--r-e-r--ew--n--t
3. Using the serial port, write the new RFREQ value
(registers 0x08—0x12). Multi-byte changes to
RFREQ can freeze the DCO to avoid unintended
RFREQ values.
Example:
An Si598 generating a 148.35 MHz clock must be
reconfigured "on-the-fly" to generate a 148.5 MHz clock.
This represents a change of +1011.122 ppm, which is
well within the ±3500 ppm window.
Center
Frequency
Configuration
small frequency changes can be made
without interruption to the output clock
4.85 GHz
12
-3500 ppm +3500 ppm
Figure 3. DCO Frequency Range
Rev. 1.0
5.67 GHz