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SI53365 Datasheet, PDF (3/14 Pages) Silicon Laboratories – 1:8 LOW JITTER CMOS CLOCK BUFFER
Si53365
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Symbol
Test Condition
Ambient Operating
TA
Temperature
Supply Voltage Range
VDD
LVCMOS
Min
Typ
Max Unit
–40
—
85
°C
1.71
1.8
1.89 V
2.38
2.5
2.63 V
2.97
3.3
3.63 V
Table 2. Input Clock Specifications
(VDD=1.8 V ± 5%, 2.5 V ± 5%, or 3.3 V ± 10%, TA=–40 to 85 °C)
Parameter
LVCMOS Input High Volt-
age
Symbol
VIH
Test Condition
VDD = 2.5 V± 5%, 1.8 V± 5%,
3.3 V± 10%
LVCMOS Input Low Volt-
age
VIL
VDD = 2.5 V± 5%, 1.8 V± 5%,
3.3 V± 10%
Input Capacitance
CIN CLK pins with respect to GND
Min
VDD x 0.7
—
—
Typ
Max Unit
—
—
V
— VDD x 0.3 V
5
—
pF
Table 3. DC Common Characteristics
(VDD = 1.8 V ± 5%, 2.5 V ± 5%, or 3.3 V ± 10%,TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Supply Current
IDD
Input High Voltage
VIH
OE
Input Low Voltage
VIL
OE
Internal Pull-up
RUP
OE
Resistor
Min
Typ
Max
Unit
—
150
mA
0.8 x VDD
—
—
V
—
—
0.2 x VDD
V
—
25
—
kΩ
Table 4. Output Characteristics—LVCMOS
(VDD = 1.8 V ± 5%, 2.5 V ± 5%, or 3.3 V ± 10%,TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Output Voltage High VOH
IOH = –12 mA
0.8x VDD
—
—
V
Output Voltage Low
VOL
IOL = 12 mA
—
—
0.2 x VDD
V
Rev. 1.0
3