SI53365 Datasheet, PDF (1/14 Pages) Silicon Laboratories – 1:8 LOW JITTER CMOS CLOCK BUFFER

Si53365
1:8 LOW JITTER CMOS CLOCK BUFFER (<200 MHZ)
Features
 8 LVCMOS outputs
 RoHS compliant, Pb-free
 Low additive jitter: 125 fs rms typ  Industrial temperature range:
 Wide frequency range: 1 to 200 MHz ^{–40 to +85 °C}
 Asynchronous output enable
 Footprint-compatible with
 Low output-output skew: <100 ps
CDCLVC1108
 1.8, 2.5, or 3.3 V operation
 16-TSSOP
Applications
 High-speed clock distribution
 Ethernet switch/router
 Optical Transport Network (OTN)
 SONET/SDH
 PCI Express Gen 1/2/3
 Storage
 Telecom
 Industrial
 Servers
 Backplane clock distribution
Description
The Si53365 is an ultra low jitter eight output LVCMOS buffer. The Si53365
utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from dc
to 200 MHz with guaranteed low additive jitter, low skew, and low propagation
delay variability. The Si53365 supports operation over the industrial temperature
range and can be operated from a 1.8 V, 2.5 V, or 3.3 V supply.
Functional Block Diagram
Ordering Information:
See page 9.
Pin Assignments
CLK ¹
OE ²
Q0 3
GND 4
16 _Q1
15 Q3
14 VDD
13 Q2
VDD 5
12 GND
Power
VDD
Supply
Q0
Filtering
Q1
Q2
Q3
CLK
Q4
Q5
Q4 6
GND 7
Q6 ⁸
Patents pending
11 _Q5
10 VDD
9 _Q7
Q6
Q7
GND
OE
Rev. 1.0 4/15
Copyright © 2015 by Silicon Laboratories
Si53365