UPIO-M3U1XX Datasheet, PDF (26/28 Pages) Silicon Laboratories – The Unified Development Platform (UDP) provides a development

UPIO-M3U1xx
Table 8. UPIO-M3U1xx Card H4 Pin Descriptions (J4) (Continued)
I/O Card
Pin
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
Signal Name
C2D_RX10_A
C2D_RX09_A
C2D_RX08_A
C2D_RX07_A
C2D_RX06_A
C2D_RX05_A
C2D_RX04_A
C2D_RX03_A
C2D_RX02_A
C2D_RX01_A
C2D_RX00_A
C2D_TX15_A
C2D_TX14_A
C2D_TX13_A
C2D_TX12_A
C2D_TX11_A
C2D_TX10_A
C2D_TX09_A
C2D_TX08_A
C2D_TX07_A
C2D_TX06_A
C2D_TX05_A
C2D_TX04_A
C2D_TX03_A
Description
PB0.8 header
PB0.7 header
PB0.6 header
PB0.5 header
97
C2D_TX02_A
98
C2D_TX01_A
99
C2D_TX00_A
100
GND
PB0.4 header
PB0.3 header
PB0.2 header
26
Rev. 0.1