UPIO-M3U1XX Datasheet, PDF (17/28 Pages) Silicon Laboratories – The Unified Development Platform (UDP) provides a development

UPIO-M3U1xx
Table 5. UPIO-M3U1xx Card H1 Pin Descriptions (J1) (Continued)
I/O Card
Pin
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
Signal Name
LIN_RX_A
LIN_TX_A
EPCA_CH5_A
EPCA_CH4_A
EPCA_CH3_A
EPCA_CH2_A
EPCA_CH1_A
EPCA_CH0_A
EPCA_ECI_A
USART_UCLK_B
USART_CTS_B
USART_RTS_B
USART_RX_B
USART_TX_B
SPI_NSS3_A
SPI_NSS2_A
SPI_NSS1_A
SPI_NSS0_A
SPI_MOSI_A
SPI_MISO_A
SPI_SCK_A
CAN_RX_B
CAN_TX_B
USART_UCLK_A
Description
PB2.2 header
PB2.1 header
PB2.8 header
PB2.9 header
PB2.10 header
PB2.11 header
PB2.14/Joystick left
PB2.13/Joystick up
PB2.12 header
PB0.4 header
96
USART_CTS_A
P
USART_RTS_A
98
USART_RX_A
99
USART_TX_A
100
GND
PB0.3 header
PB0.2 header
PB0.1 header
PB0.0 header
Rev. 0.1
17